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U6207B-FPG3 参数 Datasheet PDF下载

U6207B-FPG3图片预览
型号: U6207B-FPG3
PDF下载: 下载PDF文件 查看货源
内容描述: 1.3 GHz的PLL具有I2C总线的电视调谐器 [1.3 GHz PLL with I2C Bus for TV Tuner]
分类和应用: 电视
文件页数/大小: 8 页 / 107 K
品牌: TEMIC [ TEMIC SEMICONDUCTORS ]
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U6207B
Electrical Characteristics
Test conditions (unless otherwise specified) V
S
= 5 V, T
amb
= 25°C
Parameters
Supply current
Test Conditions / Pins
Pin 10
SW 1, 2, 7 = 0; PSC = 1
SW 1, 2, 7 = 0; PSC = 0
Symbol
Is
Is
Min.
32
22
Typ.
42
28
Max.
52
35
10
40
10
315
10
0.5
±180
±50
±5
Unit
mA
mA
mV
mV
mV
mV
Input sensitivity
fi = 80 - 1000 MHz
PSC = 1
Pin 11
Vi
1)
fi = 1300 MHz
PSC = 1
Pin 11
Vi
1)
fi = 10 - 220 MHz
PSC = 0
Pin 11
Vi
1)
Maximum input signal
PSC = 0 / 1
Pin 11 Vimax
1)
Open collector switching outputs
(SW 1,2,7)
Pin 9,8,6
Reserve current
VH = 13.5 V
IRH
Saturation voltage
IL = 10 mA
VSL
2)
Phase detector output
Charge pump current “H”
5I = 1, VPD = 2 V, Pin 1
IPDH
Charge pump current “L”
5I = 0, VDP = 2 V, Pin 1
IPDL
Charge pump leakage
T0 = 0, VPD = 2 V, Pin 1
IPDTRI
current
Bus inputs (SDA,SCL)
Input voltage
Pin 4, 5
Vi “H”
Pin 4, 5
Vi “L”
Input current
VSCL “H” = Vs, Pin 4, 5
li “H”
VSCL “L” = 0 V, Pin 4, 5
li “L”
Output voltage SDA
ISDA “L” = 2 mA , Pin 4
VSDA
(open collector)
“L”
Address selection (AS)
Input current
VAS “H” = Vs
Pin 7
liAS “H”
VAS “L” = 0 V
Pin 7
liAS “L”
Bus timing
Rise time SDA, SCL
tR
Fall time SDA, SCL
tF
Clock frequency SCL
fSCL
Clock “H” Pulse
tHIGH
Clock “L” Pulse
tLOW
Hold time start
tHSTA
Set-up time stop
tSSTO
Set-up time data
tSDAT
Hold time data
tHDAT
1)
2)
m
A
V
m
A
m
A
nA
3
5.5
1.5
10
0.4
–20
V
V
m
A
m
A
V
10
–100
15
15
100
m
A
m
A
m
s
m
s
kHz
m
s
m
s
m
s
m
s
m
s
m
s
0
4
4
4
4
0.3
0
RMS-voltage calculated from the measured available power on 50
W
.
Tested with one switch active.
TELEFUNKEN Semiconductors
Rev. A1, 29-May-96
3 (8)