欢迎访问ic37.com |
会员登录 免费注册
发布采购

71M6511H-IGTR 参数 Datasheet PDF下载

71M6511H-IGTR图片预览
型号: 71M6511H-IGTR
PDF下载: 下载PDF文件 查看货源
内容描述: 单相电能计量芯片 [Single-Phase Energy Meter IC]
分类和应用:
文件页数/大小: 95 页 / 860 K
品牌: TERIDIAN [ TERIDIAN SEMICONDUCTOR CORPORATION ]
 浏览型号71M6511H-IGTR的Datasheet PDF文件第2页浏览型号71M6511H-IGTR的Datasheet PDF文件第3页浏览型号71M6511H-IGTR的Datasheet PDF文件第4页浏览型号71M6511H-IGTR的Datasheet PDF文件第5页浏览型号71M6511H-IGTR的Datasheet PDF文件第7页浏览型号71M6511H-IGTR的Datasheet PDF文件第8页浏览型号71M6511H-IGTR的Datasheet PDF文件第9页浏览型号71M6511H-IGTR的Datasheet PDF文件第10页  
71M6511/71M6511H
Single-Phase Energy Meter IC
DATA SHEET
AUGUST 2007
Table 33: The WDTREL Bit Functions ...........................................................................................................28
Table 34: The IEN0 Register .........................................................................................................................29
Table 35: The IEN0 Bit Functions ..................................................................................................................29
Table 36: The IEN1 Register .........................................................................................................................30
Table 37: The IEN1 Bit Functions ..................................................................................................................30
Table 38: The IEN2 Register .........................................................................................................................30
Table 39: The IEN2 Bit Functions ..................................................................................................................30
Table 40: The TCON Register .......................................................................................................................31
Table 41: The TCON Bit Functions................................................................................................................31
Table 42: The IRCON Register......................................................................................................................31
Table 43: The IRCON Bit Functions ..............................................................................................................31
Table 44: External MPU Interrupts.................................................................................................................32
Table 45: Control Bits for External Interrupts .................................................................................................32
Table 46: Priority Level Groups......................................................................................................................33
Table 47: The IP0 Register: ...........................................................................................................................33
Table 48: The IP1 Register: ...........................................................................................................................33
Table 49: Priority Levels ................................................................................................................................33
Table 50: Interrupt Polling Sequence.............................................................................................................34
Table 51: Interrupt Vectors ............................................................................................................................34
Table 52: Data/Direction Registers and Internal Resources for DIO Pin Groups ...........................................36
Table 53:
DIO_DIR
Control Bit.......................................................................................................................37
Table 54: Selectable Controls using the
DIO_DIR
Bits ..................................................................................37
Table 55: MPU Data Memory Map.................................................................................................................37
Table 56: Liquid Crystal Display Segment Table (Typical).............................................................................40
Table 57:
EECTRL
Status Bits.......................................................................................................................43
Table 58:
TMUX[3:0]
Selections ....................................................................................................................44
Table 59: SSI Pin Assignment .......................................................................................................................45
Table 60: Power Saving Measures ................................................................................................................51
Table 61:
CHOP_EN
Bits...............................................................................................................................52
Table 62: Frequency over Temperature.........................................................................................................77
Page: 6 of 95
© 2005-2007 TERIDIAN Semiconductor Corporation
V2.6