FDS 6531/6532 005
Data Sheet 71M6531D/F-71M6532D/F
5.7
5.7.1
71M6531D/F Package
Package Outline
68
1
2
PIN #1 DOT
BY
MARKING
8.000
±0.050
8.000
±0.050
TOP VIEW
0.850
±0.050
0.000
±0.050
SIDE VIEW
0.203
REF
Figure 45: QFN-68 Package Outline, Top and Side View
6.300
±0.100
Exp. pad
0.400
±0.050
0.400
BSC
0.200
±0.050
2
1
PIN #1 ID R0.20, or
CHAMFER 0.500 x 45°
68
6.400
REF.
BOTTOM
VIEW
6.300
±0.100
Exp. pad
Figure 46: QFN-68 Package Outline, Bottom View
*
Pin length is nominally 0.4 mm (min = 0.3 mm, max = 0.4 mm).
Exposed pad is internally connected to GNDD.
***
Pin 1 is marked on bottom with notch or chamfered corner in the exposed pad next to pin 1.
**
v1.2
© 2005-2009 TERIDIAN Semiconductor Corporation
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