FDS_6533_6534_004
System
(V3P3SYS)
71M6533/71M6534 Data Sheet
V1_OK
Battery
Current
300 nA
MPU Mode
BROWNOUT
Transition
MISSION
WAKE
13..14 CK
cycles
MPU Clock
Source
Xtal
PLL
(4.2 MHz/MUX_DIV)
2048...4096
CK32 cycles
PLL_OK
Power
Figure 24: Transition from BROWNOUT to MISSION Mode when System Power Returns
V3P3SYS
and VBAT
V1_OK
Battery
Current
BROWN-
OUT
Xtal
300 nA
MPU Mode
MISSION
MPU Clock
Source
PLL
(4.2 MHz)
WAKE
14.5 CK32
cycles
4096 CK32
cycles
PLL_OK
Internal
RESETZ
1024 CK32
cycles
time
Figure 25: Power-Up Timing with V3P3SYS and VBAT tied together
v1.1
© 2007-2009 TERIDIAN Semiconductor Corporation
61
TERIDIAN [ TERIDIAN SEMICONDUCTOR CORPORATION ]
