DS_1215F_003
73S1215F Data Sheet
RESET
ANA_IN
TEST
TCLK
ISBR
RXTX
ERST
GND
TBUS3
ICE INTERFACE
VDD
CPUCLK
PLL
and
TIMEBASES
TBUS2
TBUS0
TBUS1
SEC
VDD
VOLTAGE REFERENCE
AND FUSE TRIM
CIRCUITRY
VPD REGULATOR
VCC
CONTROL
LOGIC
VPC
VCC
GND
X12IN
X12OUT
X32IN
X32OUT
12MHz
OSCILLATOR
RST
CLK
SMART CARD LOGIC
ISO UART and CLOCK GENERATOR
SMART
CARD
ISO
INTERFACE
I/O
AUX1
AUX2
32kHz
OSCILLATOR
OCDSI
RTC
FLASH/ROM
PROGRAM
MEMORY
64KB
MEMORY_
CONTROL
CONTROL
UNIT
VDD
D+
D-
GND
RAM_
SFR_
CONTROL
TIMER_0_
1
PRES
PRESB
EXTERNAL
SMART
CARD
INTERFACE
USB I/O
and
LOGIC
FLASH
INTERFACE
SCRATCH
IRAM
256B
ALU
CORE
SCLK
SIO
ROW0
ROW1
ROW2
ROW3
ROW4
ROW5
COL0
COL1
COL2
COL3
COL4
USR0
USR1
USR2
USR3
USR4
USR5
USR6
USR7
USR8
KEYPAD
INTERFACE
DATA
XRAM
2KB
PMU
WATCH-
DOG
TIMER
INT2
ISR
INT3
PORTS
SERIAL
I
2
C
MASTER
INT.
SCL
SDA
PERIPHERAL
INTERFACE
and SFR LOGIC
LED
DRIVERS
LED1
LED0
LED2
Pins only avaiable on 68 pin package.
Figure 1: IC Functional Block Diagram
Rev. 1.4
LED3
GND
RXD
TXD
Pins avaiable on both 68 and 44 pin packages.
USR(8:0)
DRIVERS
7
TERIDIAN [ TERIDIAN SEMICONDUCTOR CORPORATION ]
