78Q8430 10/100 Ethernet
MAC and PHY
Simplifying System Integration
TM
DATA SHEET
March 2009
DESCRIPTION
The Teridian 78Q8430 is a 10/100 Fast Ethernet
controller supporting multi-media offload. The
device is optimized for host processor offloading
and throughput enhancements for demanding
multi-media applications found in Set Top Box,
IP Video and Broadband Media Appliance
applications. The 78Q8430 seamlessly
interfaces to non-PCI processors through a
simplified pseudo SRAM-like Host Bus Interface
supporting 32/16/8 bit data bus widths.
Supported features include IEEE802.3x flow
control and full IEEE802.3 and 802.3u standards
compliance.
Supporting 10Base-T and 100Base-TX, the
transceiver provides Auto MDI-X cable
cross-over correction, AUTO Negotiation, Link
Configuration and full/half duplex support with
full duplex flow control. The line interface
requires only a dual 1:1 isolation transformer.
Numerous packet processing and IP address
resolution control functions are incorporated,
including an extensive set of Error Monitoring,
Reporting and Troubleshooting features. The
78Q8430 provides optimal 10/100 Ethernet
connectivity in demanding video streaming and
mixed-media applications.
BENEFITS
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Support for IEEE-802.3, IEEE-802.3u and
IEEE-802.3-2000 Annex 31.B
Low host CPU utilization/overhead with
minimal software driver overhead and small
driver memory space requirements
Improved packet processing, low latency and
low host CPU utilization
Highest performance streaming Video over IP
Optimized performance in mixed media
application such as video, data and voice
Ease of use, faster development cycles, high
throughput
Optimized power conservation with automatic
turn on when needed
Reduced host CPU utilization and overhead
Improved packet processing
Optimized performance in mixed media
applications
FEATURES
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Single chip 10Base-T/100Base-TX
IEEE-802.3 compliant MAC and PHY
Adaptive 32 kB SRAM FIFO memory
allocation between Tx and Rx paths
Queue independent user settable water
marks
Per queue status indication
Address Resolution Controller (ARC)
Multiple perfect address filtering: 8 default
(max 12)
Wildcard address filtering, individual,
multicast and broadcast address
recognition and filtering
Positive/negative filtering and promiscuous
mode
64 kB JUMBO packet support
QoS: 4 Transmit priority levels
Non-PCI pseudo-SRAM Host Bus Interface
8-bit, 16-bit and 32-bit bus width
Big/little endian support for 16-bit/32-bit bus
widths
Asynchronous (100 MHz) and synchronous
(50 MHz) bus clock support
Low power and flexible power supply
management
Power down/save
Wake on LAN (Magic Packet™, OnNow
packet)
Link status change
Traffic Offload Engine Functionality
Transfer frame: APF & ICMP Echo
IP Firewall configuration: drop frames on
source IP address
IP Checksum
Available in an industrial temperature range
(
-40
°C
to +85
°C)
RoHS compliant (6/6) lead-free package
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APPLICATIONS
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Satellite, cable and IPTV Set Top Boxes
Multi Media Residential Gateways
High Definition 1080p/1080i DTVs
IP-PVR and video distribution systems
Digital Video Recorders/Players
Routers and IADs
Video over IP system, IP-PBX
IP Security Cameras / PVRs
Low latency industrial automation
1
Rev. 1.2
© 2009 Teridian Semiconductor Corporation
TERIDIAN [ TERIDIAN SEMICONDUCTOR CORPORATION ]
