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THCV214 参数 Datasheet PDF下载

THCV214图片预览
型号: THCV214
PDF下载: 下载PDF文件 查看货源
内容描述: LVDS SERDES发送器和接收器 [LVDS SerDes transmitter and receiver]
分类和应用:
文件页数/大小: 1 页 / 39 K
品牌: THINE [ THINE ELECTRONICS, INC. ]
   
THCV213 and THCV214 Rev.0.30
Preliminary
THine
THCV213 and THCV214
LVDS SerDes transmitter and receiver
General Description
THCV213 and THCV214 is designed to support a pixel
data transmission between the Host and Display. The
chipset can transmit 18bit data and 4bit control data
through only a single differential cable at pixel clock
frequency from 5MHz to 40MHz.
By V-by-One
TM
technologies, unique encoding scheme
and proprietary CDR technique, a link synchlonization
is achieved without any frequency reference such as
crystal oscillator. It drastically improves the cost and
size of the display system.
THCV213 transmitter converts the data into a single
LVDS serial data stream with embedded clock. It sup-
ports pre-emphasis mode for long cable transmission.
THCV214 receiver extracts the clock from the embed-
ded clock and transforms the serial data stream back
into the parallel data.
To confirm the reliability of link, several functions are
supported. THCV213 can transmit a INIT pattern to
establish a link if INIT sequence is required. THCV214
indicates the LOCK status.
Features
Transmit 18bit data and 4bit control data through a
single differential cable
Wide frequency range: 5MHz to 40MHz
Support INIT pattern and LOCK indicator
Pre Emphasis Mode
Clock Edge Selectable
Dual Display Mode
Power Down Mode
Low power single 3.3V CMOS design
48pin TQFP/QFN
Block Diagram
THCV213
D[17:0]
TXOUT1+ RXIN+
THCV214
D[17:0]
TXOUT2+
TXOUT2-
Deserialize
Serializer
SYNC[2:0]
TXOUT1-
RXIN-
Output Buffer
Input Buffer
DE
DE
SYNC[2:0]
INIT
PRBS
OE
PLL
CLKIN
EDGE
PRE[1:0]
DUAL
PDWN
PLL & CDR
CLKOUT
EDGE
MOD[1:0]
LOCKN
PDWN
1
Copyright 2004, THine Electronics Inc., All rights reserved