CD4541B
Digital Timer Application
A positive pulse on MASTER RESET resets the counters
and latch. The output goes high and remains high until the
number of pulses, selected by A and B, are counted. This
circuit is retriggerable and is as accurate as the input fre-
quency. If additional accuracy is desired, an external clock
can be used on pin 3. A setup time equal to the width of the
one-shot output is required immediately following initial
power up, during which time the output will be high.
V
DD
R
C
TC
1
14
2
3
4
5
13
12
11
10
B
A
TC
R
AR
MR
S
6
7
9
8
OUTPUT
INPUT
t
FIGURE 3. DIGITAL TIMER APPLICATION CIRCUIT
5