SLLS324H – DECEMBER 1998 – REVISED MAY 2007
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PARAMETER MEASUREMENT INFORMATION (continued)
3.75 kΩ
Y
Input
DA
Z
3.75 kΩ
V
OD
50
Ω
+
_
0
≤
V
test
≤
2.4 V
Input
t
PHL
2V
1.4 V
0.8 V
t
PLH
100%
80%
Output
V
OD(H)
0V
V
OD(L)
20%
0%
t
f
t
r
A.
All input pulses are supplied by a generator having the following characteristics: t
r
or t
f
≤
1 ns, pulse repetition rate
(PRR) = 50 Mpps, pulse width = 10 ± 0.2 ns . C
L
includes instrumentation and fixture capacitance within 0,06 mm of
the D.U.T.
Figure 2. Test Circuit, Timing, and Voltage Definitions for the Differential Output Signal
Driver Enable
Y
Input
Z
V
OC
C
L
= 10 pF
(2 Places)
V
OC
V
OC(PP)
V
OC(SS)
25
Ω, ±1%
(2 Places)
3V
0V
A.
All input pulses are supplied by a generator having the following characteristics: t
r
or t
f
≤
1 ns, pulse repetition rate
(PRR) = 50 Mpps, pulse width = 10 ± 0.2 ns . C
L
includes instrumentation and fixture capacitance within 0,06 mm of
the D.U.T. The measurement of V
OC(PP)
is made on test equipment with a -3 dB bandwidth of at least 300 MHz.
Figure 3. Test Circuit and Definitions for the Driver Common-Mode Output Voltage
8
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