SN54HC138, SN74HC138
3 LINE TO 8 LINE DECODERS/DEMULTIPLEXERS
SCLS107E − DECEMBER 1982 − REVISED SEPTEMBER 2003
description/ordering information (continued)
The conditions at the binary-select inputs at the three enable inputs select one of eight output lines. Two
active-low and one active-high enable inputs reduce the need for external gates or inverters when expanding.
A 24-line decoder can be implemented without external inverters, and a 32-line decoder requires only one
inverter. An enable input can be used as a data input for demultiplexing applications.
FUNCTION TABLE
INPUTS
ENABLE
G1
X
X
L
H
H
H
H
H
H
H
H
G2A
H
X
X
L
L
L
L
L
L
L
L
G2B
X
H
X
L
L
L
L
L
L
L
L
C
X
X
X
L
L
L
L
H
H
H
H
SELECT
B
X
X
X
L
L
H
H
L
L
H
H
A
X
X
X
L
H
L
H
L
H
L
H
Y0
H
H
H
L
H
H
H
H
H
H
H
Y1
H
H
H
H
L
H
H
H
H
H
H
Y2
H
H
H
H
H
L
H
H
H
H
H
OUTPUTS
Y3
H
H
H
H
H
H
L
H
H
H
H
Y4
H
H
H
H
H
H
H
L
H
H
H
Y5
H
H
H
H
H
H
H
H
L
H
H
Y6
H
H
H
H
H
H
H
H
H
L
H
Y7
H
H
H
H
H
H
H
H
H
H
L
2
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