SN74LVC1G04
SINGLE INVERTER GATE
www.ti.com
SCES214S – APRIL 1999 – REVISED OCTOBER 2005
FEATURES
•
•
•
•
•
•
Available in the Texas Instruments
NanoStar™ and NanoFree™ Packages
Supports 5-V V
CC
Operation
Inputs Accept Voltages to 5.5 V
Max t
pd
of 3.3 ns at 3.3 V
Low Power Consumption, 10-µA Max I
CC
±24-mA
Output Drive at 3.3 V
DBV PACKAGE
(TOP VIEW)
•
•
•
I
off
Supports Partial-Power-Down Mode
Operation
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
DRL PACKAGE
(TOP VIEW)
DCK PACKAGE
(TOP VIEW)
NC
A
GND
1
5
V
CC
NC
A
1
2
3
5
V
CC
NC
A
1
2
3
5
V
CC
Y
2
GND
4
4
Y
GND
4
3
Y
YEA, YEP, YZA, OR YZP PACKAGE
(BOTTOM VIEW)
YZV PACKAGE
(BOTTOM VIEW)
GND
A
DNU
3 4
2
1 5
Y
V
CC
GND
A
2 3
1 4
Y
V
CC
DNU − Do not use
See mechanical drawings for dimensions.
DESCRIPTION/ORDERING INFORMATION
This single inverter gate is designed for 1.65-V to 5.5-V V
CC
operation.
The SN74LVC1G04 performs the Boolean function Y = A.
NanoStar™ and NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the
die as the package.
This device is fully specified for partial-power-down applications using I
off
. The I
off
circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
NanoStar, NanoFree are trademarks of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 1999–2005, Texas Instruments Incorporated
TI [ TEXAS INSTRUMENTS ]
