TLC5615C, TLC5615I
10-BIT DIGITAL-TO-ANALOG CONVERTERS
SLAS142C – OCTOBER 1996 – REVISED MARCH 2000
digital input timing requirements (see Figure 1)
PARAMETER
tsu(DS)
th(DH)
tsu(CSS)
tsu(CS1)
th(CSH0)
th(CSH1)
tw(CS)
tw(CL)
tw(CH)
Setup time, DIN before SCLK high
Hold time, DIN valid after SCLK high
Setup time, CS low to SCLK high
Setup time, CS high to SCLK high
Hold time, SCLK low to CS low
Hold time, SCLK low to CS high
Pulse duration, minimum chip select pulse width high
Pulse duration, SCLK low
Pulse duration, SCLK high
MIN
45
0
1
50
1
0
20
25
25
NOM
MAX
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
ns
output switching characteristic
PARAMETER
tpd(DOUT)
Propagation delay time, DOUT
CL = 50 pF
TEST CONDITIONS
MIN
NOM
MAX
50
UNIT
ns
operating characteristics over recommended operating free-air temperature range, V
DD
= 5 V
±
5%,
V
ref
= 2.048 V (unless otherwise noted)
analog output dynamic performance
PARAMETER
SR
ts
Output slew rate
Output settling time
Glitch energy
CL = 100 pF,
TA = 25°C
To 0.5 LSB,
RL = 10 kΩ,
DIN = All 0s to all 1s
TEST CONDITIONS
RL = 10 kΩ,
CL = 100 pF,
See Note 10
MIN
0.3
TYP
0.5
12.5
5
MAX
UNIT
V/µs
µs
nV
s
NOTE 10: Settling time is the time for the output signal to remain within
±
0.5 LSB of the final measured value for a digital input code change of
000 hex to 3FF hex or 3FF hex to 000 hex.
reference input (REFIN)
PARAMETER
Reference feedthrough
Reference input
bandwidth (f–3dB)
TEST CONDITIONS
REFIN = 1 Vpp at 1 kHz + 2.048 Vdc (see Note 11)
REFIN = 0.2 Vpp + 2.048 Vdc
REFIN = 0.2 Vpp + 2.048 Vdc
MIN
TYP
– 80
30
MAX
UNIT
dB
kHz
NOTE 11: Reference feedthrough is measured at the DAC output with an input code = 000 hex and a Vref input = 2.048 Vdc + 1 Vpp at 1 kHz.
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•
DALLAS, TEXAS 75265
5
TI [ TEXAS INSTRUMENTS ]
