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TLV320AIC23BPWR 参数 Datasheet PDF下载

TLV320AIC23BPWR图片预览
型号: TLV320AIC23BPWR
PDF下载: 下载PDF文件 查看货源
内容描述: 具有集成耳机放大器立体声音频编解码8至96 kHz [STEREO AUDIO CODEC 8 TO 96 KHZ WITH INTEGRATED HEADPHONE AMPLIFIER]
分类和应用: 放大器
文件页数/大小: 50 页 / 491 K
品牌: TI [ TEXAS INSTRUMENTS ]
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1.4 Ordering Information
PACKAGE
TA
−10°C to 70°C
−40°C to 85°C
32-Pin
MicroStar Junior GQE/ZQE
TLV320AIC23BGQE/ZQE
TLV320AIC23BIGQE/ZQE
28-Pin
TSSOP PW
TLV320AIC23BPW
TLV320AIC23BIPW
28-Pin
PQFP RHD
TLV320AIC23BRHD
TLV320AIC23BIRHD
1.5 Terminal Functions
TERMINAL
NO.
NAME
AGND
AVDD
BCLK
BVDD
CLKOUT
CS
GQE/
ZQE
5
4
23
21
22
12
PW
15
14
3
1
2
21
RHD
12
11
28
26
27
18
O
I
I/O
Analog supply return
Analog supply input. Voltage level is 3.3 V nominal.
I2S serial-bit clock. In audio master mode, the AIC23B generates this signal and sends it to the
DSP. In audio slave mode, the signal is generated by the DSP.
Buffer supply input. Voltage range is from 2.7 V to 3.6 V.
Clock output. This is a buffered version of the XTI input and is available in 1X or 1/2X frequencies
of XTI. Bit 07 in the sample rate control register controls frequency selection.
Control port input latch/address select. For SPI control mode this input acts as the data latch
control. For 2-wire control mode this input defines the seventh bit in the device address field.
See Section 3.1 for details.
I2S format serial data input to the sigma-delta stereo DAC
Digital supply return
I2S format serial data output from the sigma-delta stereo ADC
Digital supply input. Voltage range is 1.4 V to 3.6 V.
Analog headphone amplifier supply return
Analog headphone amplifier supply input. Voltage level is 3.3 V nominal.
O
I
O
I/O
I/O
O
I
I
Left stereo mixer-channel amplified headphone output. Nominal 0-dB output level is 1 VRMS.
Gain of –73 dB to 6 dB is provided in 1-dB steps.
Left stereo-line input channel. Nominal 0-dB input level is 1 VRMS. Gain of –34.5 dB to 12 dB is
provided in 1.5-dB steps.
Left stereo mixer-channel line output. Nominal output level is 1.0 VRMS.
I2S DAC-word clock signal. In audio master mode, the AIC23B generates this framing signal
and sends it to the DSP. In audio slave mode, the signal is generated by the DSP.
I2S ADC-word clock signal. In audio master mode, the AIC23B generates this framing signal
and sends it to the DSP. In audio slave mode, the signal is generated by the DSP.
Buffered low-noise-voltage output suitable for electret-microphone-capsule biasing. Voltage
level is 3/4 AVDD nominal.
Buffered amplifier input suitable for use with electret-microphone capsules. Without external
resistors a default gain of 5 is provided. See Section 2.3.1.2 for details.
Serial-interface-mode input. See Section 3.1 for details.
Not Used—No internal connection
10
19
13
7
16
10
O
I
O
Right stereo mixer-channel amplified headphone output. Nominal 0-dB output level is 1 VRMS.
Gain of −73 dB to 6 dB is provided in 1-dB steps.
Right stereo-line input channel. Nominal 0-dB input level is 1 VRMS. Gain of –34.5 dB to 12 dB is
provided in 1.5-dB steps.
Right stereo mixer-channel line output. Nominal output level is 1.0 VRMS.
I/O
DESCRIPTION
DIN
DGND
DOUT
DVDD
HPGND
HPVDD
LHPOUT
LLINEIN
LOUT
LRCIN
LRCOUT
MICBIAS
MICIN
MODE
NC
RHPOUT
RLINEIN
ROUT
24
20
27
19
32
29
30
11
2
26
28
7
8
13
1, 9
17, 25
31
10
3
4
28
6
27
11
8
9
20
12
5
7
17
18
22
1
25
3
24
8
5
6
17
9
2
4
14
15
19
I
O
1−5