欢迎访问ic37.com |
会员登录 免费注册
发布采购

UC2914 参数 Datasheet PDF下载

UC2914图片预览
型号: UC2914
PDF下载: 下载PDF文件 查看货源
内容描述: 5V至35V热插拔电源管理器 [5V to 35V Hot Swap Power Manager]
分类和应用:
文件页数/大小: 14 页 / 647 K
品牌: TI [ TEXAS INSTRUMENTS ]
 浏览型号UC2914的Datasheet PDF文件第1页浏览型号UC2914的Datasheet PDF文件第2页浏览型号UC2914的Datasheet PDF文件第3页浏览型号UC2914的Datasheet PDF文件第5页浏览型号UC2914的Datasheet PDF文件第6页浏览型号UC2914的Datasheet PDF文件第7页浏览型号UC2914的Datasheet PDF文件第8页浏览型号UC2914的Datasheet PDF文件第9页  
UC1914
UC2914
UC3914
ELECTRICAL CHARACTERISTICS:
Unless otherwise specified, T
A
= 0°C to 70°C for the UC3914, –40°C to 85°C for the
UC2914, and –55°C to 125°C for the UC1914. VCC = 12V, V
PUMP
= V
PUMP
(max), SD = 5V, CP1 = CP2 = C
PUMP
= 0.01µF.
T
A
= T
J
.
PARAMETER
Latch Section
LR Threshold
Input Current
Power Limiting Section
Duty Cycle Control
Overload Section
Delay to Output
Threshold
(Note 1)
Respect to IMAX
–250
500
–200
1250
–150
ns
mV
In Fault, I
PLIM
= 200µA
In Fault, I
PLIM
= 3mA
0.6
0.05
1.3
0.12
2.0
0.20
%
%
High to Low
LR = 5V
0.6
1.4
500
2.0
750
V
µA
TEST CONDITIONS
MIN
TYP
MAX UNITS
Note 1: Guaranteed by design. Not 100% tested in production.
Note 2: A mathematical averaging is used to determine this value. See Application Section for more information.
PIN DESCRIPTIONS
CT:
A capacitor is connected to this pin in order to set
the maximum fault time. The minimum fault time must be
more than the time to charge external load capacitance.
The fault time is defined as:
a power-on-reset occurs. Pulling this pin low before the
reset time is reached will not clear the fault until the reset
time is reached. Floating or holding this pin low will result
in the part repeatedly trying to reset itself if a fault oc-
curs.
OUT:
Output drive to the MOSFET pass element. Inter-
nal clamping ensures that the maximum V
GS
drive is
15V.
OSC, OSCB:
Complementary output drivers for interme-
diate charge pump stages. A 0.01µF capacitor should be
placed between OSC and PMP, and OSCB and PMPB.
PLIM:
This feature ensures that the average MOSFET
power dissipation is controlled. A resistor is connected
from this pin to VCC. Current will flow into PLIM which
adds to the fault timer charge current, reducing the duty
cycle from the typical 3% level. When I
PL
>> 100µA then
the average MOSFET power dissipation is given by:
–6
P
FET_AVG
= IMAX • 3 • 10 •R
PL
.
PMP, PMPB:
Complementary pins which couple charge
pump capacitors to internal diodes and are used to pro-
vide charge to the reservoir capacitor tied to VPUMP.
Typical capacitor values used are 0.01µF.
REF:
–2V reference with respect to VCC used to pro-
gram the IMAX pin voltage. A 0.1µF ceramic or tantalum
capacitor
MUST
be tied between this pin and VCC to en-
sure proper operation of the chip.
SD:
When this TTL compatible input is brought to a logic
low, the output of the linear amplifier is driven low,
FAULT is pulled low and the IC is put into a low power
mode. The
ABSOLUTE
maximum voltage that can be
placed on this pin is 12V.
4
T
FAULT
=
2
CT
I
CH
where I
CH
= 100µA + I
PL
, where I
PL
is the current into the
power limit pin. Once the fault time is reached the output
will shutdown for a time given by:
T
SD
=
2
CT
I
DIS
where I
DIS
is nominally 3µA.
FAULT:
Open collector output which pulls low upon any
of the following conditions: Timer fault, Shutdown, UVLO.
This pin
MUST
be pulled up to VCC or another supply
through a suitable impedance.
GND:
Ground reference for the IC.
IMAX:
This pin programs the maximum allowable
sourcing current. Since REF is a –2V reference (with re-
spect to VCC), a voltage divider can be derived from
VCC to REF in order to generate the program level for
the IMAX pin. The current level at which the output ap-
pears as a current source is equal to the voltage on the
IMAX pin, with respect to VCC, divided by the current
sense resistor. If desired, a controlled current startup can
be programmed with a capacitor on IMAX to VCC.
LR:
If this pin is held high and a fault occurs, the timer
will be prevented from resetting the fault latch when CT is
discharged below the reset comparator threshold. The
part will not retry until this pin is brought to a logic low or