tm
TE
CH
T14M256A
SRAM
FEATURES
•
High speed access time: 7/8/10/12/15ns(max.)
•
Low power consumption : Active 300 mW (typ.)
•
Single + 5 power supply
•
Fully static operation – No clock or refreshing
required
•
All inputs and outputs directly TTL compatible
•
Common I/O capability
•
Available packages : 28-pin 300 mil SOJ and
TSOP-I (forward type ).
•
Output enable (
OE
) available for very fast
access
•
Mix-mode Outputs
32K X 8 HIGH SPEED
CMOS STATIC RAM
GENERAL DESCRIPTION
The T14M256A is a high speed, low power
CMOS static RAM organized as 32,768 x 8 bits
that operates on a single 5-volt power supply.
This device is packaged in a standard 28-pin 300
mil SOJ or TSOP-I forward.
BLOCK DIAGRAM
Vcc
→
V
SS
→
A0
.
.
.
A 14
CS
OE
WE
CONTROL
DATA I/O
I/O 1
.
.
.
I/O 8
DECODER
CORE
ARRAY
PIN CONFIGURATION
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O1
I/O2
I/O3
Vss
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
Vcc
WE
A13
A8
A9
A11
OE
A10
CS
I/O8
I/O7
I/O6
I/O5
I/O4
SOJ
23
22
21
20
19
18
17
16
15
PIN DESCRIPTION
SYMBOL
A0 - A14
I/O1 - I/O8
CS
WE
OE
28
27
26
25
24
23
22
21
20
19
18
17
16
15
A10
CS
I/O8
I/O7
I/O6
I/O5
I/O4
VSS
I/O3
I/O2
I/O1
A0
A1
A2
OE
A11
A9
A8
A13
WE
VCC
A14
A12
A7
A6
A5
A4
A3
1
2
3
4
5
6
7
8
9
10
11
12
13
14
Vcc
Vss
DESCRIPTION
Address Inputs
Data Inputs/Outputs
Chip Select Inputs
Write Enable
Output Enable
Power Supply
Ground
Operating
Temperatur
e
0 ~ +70
°C
PART NUMBER EXAMPLES
PART NO.
T 14M256 A-8J
T 14M256 A-8 P
T 14M256 A-8JE
T 14M256 A-8 P E
PACKAG
E CODE
S=SOJ
8ns
P =TSOP-I
S=SOJ
P =TSOP-I
8ns
-20 ~ +70
°C
SPEED
TSOP-I
TM Technology Inc. reserves the right
P. 1
to change products or specifications without notice.
Publication Date: FEB. 2004
Revision:H
TMT [ TAIWAN MEMORY TECHNOLOGY ]
