tm
TE
CH
Preliminary T15V4M08A
SRAM
FEATURES
•
Low-power consumption
- Active: 40mA at 55ns
- Stand-by: 10uA (CMOS input/output)
•
55/70/100 ns access time
•
Equal access and cycle time
•
Single +2.7V to 3.6V Power Supply
•
TTL compatible , Tri-state output
•
Common I/O capability
•
Automatic power-down when deselected
•
Available in 32-pin TSOP-I(8x13.4mm) and
48-pin CSP packages
512K X 8 LOW POWER
CMOS STATIC RAM
GENERAL DESCRIPTION
The T15V4M08A is a very Low Power
CMOS Static RAM organized as 524,288 words by
8 bits . This device is fabricated by high
performance CMOS technology. It can be
operated under wide power supply voltage range
from +2.7V to +3.6V.
The T15V4M08A inputs and three-state
outputs are TTL compatible and allow for direct
interfacing with common system bus structures.
Data retention is guaranteed at a power supply
voltage as low as 1.5V.
PART NUMBER EXAMPLES
PART NO.
T15V4M08A-55C
T15V4M08A-70P
PACKAGE CODE
P= TSOP-I(8x13.4)
C = CSP
Vcc
Vss
A0
.
.
.
A18
DECODER
CORE
ARRAY
WE
OE
CE
CONTROL
CIRCUIT
DATA I/O
I/O1
.
.
.
I/O8
BLOCK DIAGRAM
Taiwan Memory Technology, Inc. reserves the right
to change products or specifications without notice.
P. 1
Publication Date: MAR. 2001
Revision:0.A
TMT [ TAIWAN MEMORY TECHNOLOGY ]
