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Preliminary T15V4M16A
CAPACITANCE
(f = 1 MHz, Ta = 25°C,)
PARAMETER
Input Capacitance
Input/ Output Capacitance
SYMBOL
CONDITION
V
IN
= 0V
V
IN
=
V
OUT
= 0V
MAX.
8
10
UNIT
pF
pF
C
IN
C
I /O
Note:
This parameter is guaranteed by device characterization and is not production tested.
AC TEST CONDITIONS
PARAMETER
Input Pulse Levels
Input Rise and Fall Times
Input and Output Timing Reference Leve l
Output Load
CONDITIONS
0.6V to 2.1V
3.0 ns
1.4V
C
L
=30pF+1TTL Load(55ns/70ns)
C
L
=100pF+1TTL Load(Load for 100ns)
AC TEST LOADS AND WAVEFORM
TTL
DQ
R
L
50 ohm
C
L
30 pF
C
L
*
Z
0
= 50 ohm
Vt =1.4V
Fig.A * Including Scope and Jig Capacitance
Fig.B Output Load Equivalent
Taiwan Memory Technology, Inc. reserves the right
to change products or specifications without notice.
P. 5
Publication Date: SEP. 2000
Revision:0.B
TMT [ TAIWAN MEMORY TECHNOLOGY ]
