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TE
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T4312816B
SDRAM
FEATURES
Fast access time from clock: 5/5.4 ns
Fast clock rate: 166/143 MHz
Fully synchronous operation
Internal pipelined architecture
2M word x 16-bit x 4-bank
Programmable Mode registers
- CAS# Latency: 2, or 3
- Burst Length: 1, 2, 4, 8, or full page
- Burst Type: interleaved or linear burst
- Burst stop function
Auto Refresh and Self Refresh
4096 refresh cycles/64ms
CKE power down mode
Single +3.3V power supply
Interface: LVTTL
54-pin 400 mil plastic TSOP II package
Lead-free package is available
8M x 16 SDRAM
2M x 16bit x 4Banks Synchronous DRAM
GRNERAL DESCRIPTION
The T4312816B SDRAM is a high-speed CMOS
synchronous DRAM containing 128 Mbits. It is internally
configured as 4 Banks of 2M word x 16 DRAM with a
synchronous interface (all signals are registered on the
positive edge of the clock signal, CLK). Read and write
accesses to the SDRAM are burst oriented; accesses start at
a selected location and continue for a programmed number
of locations in a programmed sequence. Accesses begin
with the registration of a BankActivate command which is
then followed by a Read or Write command.
The T4312816B provides for programmable Read or
Write burst lengths of 1, 2, 4, 8, or full page, with a burst
termination option. An auto precharge function may be
enabled to provide a self-timed row precharge that is
initiated at the end of the burst sequence. The refresh
functions, either Auto or Self Refresh are easy to use.
By having a programmable mode register, the system
can choose the most suitable modes to maximize its
performance. These devices are well suited for applications
requiring high memory bandwidth and particularly well
suited to high performance PC applications
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PIN ARRANGEMENT (Top
View)
V DD
DQ0
V DDQ
DQ1
DQ2
V SSQ
DQ3
DQ4
V DDQ
DQ5
DQ6
V SSQ
DQ7
V DD
DQM L
/WE
/CA S
/RA S
/CS
BA0
BA1
A 1 0 (A P)
A0
A1
A2
A3
V DD
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
V SS
DQ1 5
V SSQ
DQ1 4
DQ1 3
V DDQ
DQ1 2
DQ1 1
V SSQ
DQ1 0
DQ9
V DDQ
DQ8
V SS
NC
DQM U
CL K
CK E
NC
A11
A9
A8
A7
A6
A5
A4
V SS
ORDERING INFORMATION
Key Specifications
T4312816B
- 6/7
6/7 ns
5/5.4 ns
42/42 ns
60/63 ns
t
CK3
t
AC3
t
RAS
t
RC
Clock Cycle time(min.)
Access time from CLK(max.)
Row Active time(min.)
Row Cycle time(min.)
Ordering Information
Part Number
T4312816B –6S
T4312816B –6SG
T4312816B –7S
T4312816B –7SG
“G” indicates Lead-free
Frequency
166MHz
166MHz
143MHz
143MHz
Package
TSOP II
TSOP II
TSOP II
TSOP II
TM Technology Inc. reserves the right
P. 1
to change products or specifications without notice.
Publication Date: FEB. 2007
Revision: A
TMT [ TAIWAN MEMORY TECHNOLOGY ]
