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T431616C
SDRAM
FEATURES
3.3V power supply
Clock cycle time : 6 / 7 ns
Dual banks operation
LVTTL compatible with multiplexed address
All inputs are sampled at the positive going
edge of system clock
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Burst Read Single-bit Write operation
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DQM for masking
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Auto refresh and self refresh
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32ms refresh period (2K cycle)
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MRS cycle with address key programs
- CAS Latency ( 2 & 3 )
- Burst Length ( 1 , 2 , 4 , 8 & full page)
- Burst Type (Sequential & Interleave)
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Available package type :
- 50 pin TSOP(II)/lead-free
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Operating temperature :
- 0 ~ +70
°C
1M x 16 SDRAM
512K x 16bit x 2Banks Synchronous DRAM
GRNERAL DESCRIPTION
The T431616C is 16,777,216 bits synchronous
high data rate Dynamic RAM organized as
2 x 524,288 words by 16 bits , fabricated with high
performance CMOS technology . Synchronous
design allows precise cycle control with the use of
system clock I/O transactions are possible on every
clock cycle . Range of operating frequencies ,
programmable burst length and programmable
latencies allow the same device to be useful for a
variety of high bandwidth , high performance
memory system applications.
ORDERING INFORMATION
PART NO.
CLOCK
CYCLE TIME
6ns
6ns
7ns
7ns
MAX
FREQUENCY
PACKAGE
TSOP-II
TSOP-II
Lead-free
TSOP-II
TSOP-II
Lead-free
OPERATING
TEMPERATURE
T431616C-6S
T431616C-6SG
T431616C-7S
T431616C-7SG
166 MHz
166 MHz
143 MHz
143 MHz
0 ~ +70
°C
0 ~ +70
°C
0 ~ +70
°C
0 ~ +70
°C
TM Technology Inc. reserves the right
P. 1
to change products or specifications without notice.
Publication Date: AUG. 2004
Revision: A
TMT [ TAIWAN MEMORY TECHNOLOGY ]
