tm
F8H
F0H
E8H
E0H
D8H
D0H
C8H
C0H
B8H
B0H
A8H
A0H
98H
90H
88H
80H
TE
CH
T81L0006A/B
10.3 Special Function Register
B
ACC
PSW
T2CON
IP
P3
IE
P2
SCON
P1
TCON
P0*
T2MOD RCAP2L RCAP2H
TL2
TH2
SBUF
TMOD
SP
TL0
DPL
TL1
DPH
TH0
TH1
WDREL
PCON
*Note: P0:Internal still keeping, but for pad dominate, no external pin assignment
Accumulator : ACC
ACC is the Accumulator register. The mnemonics for Accumulator-Specific instructions, however, refer to the
Accumulator simply as A.
B Register : B
The B register is used during multiply and divide operations. For other instructions it can be treated as another scratch
pad register.
Program Status Word : PSW
The PSW register contains program status information as detailed in
CY
AC
F0
RS1
RS0
OV
--
P
BIT SYMBOL FUNCTION
PSW.7 CY Carry flag.
PSW.6 AC Auxiliary Carry flag. (For BCD operations.)
PSW.5 F0
Flag 0. (Available to the user for general purposes.)
PSW.4 RS1 Register bank select control bit 1.
Set/cleared by software to determine working register bank. (See
Note.)
PSW.3 RS0 Register bank select control bit 0.
Set/cleared by software to determine working register bank. (See
Note.)
PSW.2 OV Overflow flag.
PSW.1 —
User-definable flag.
PSW.0 P
Parity flag.
Set/cleared by hardware each instruction cycle to indicate an odd/even number of “one” bits in the
Accumulator, i.e., even parity.
NOTE:
The contents of (RS1, RS0) enable the working register banks as follows:
(0,0)— Bank 0 (00H–07H)
(0,1)— Bank 1 (08H–0fH)
(1,0)— Bank 2 (10H–17H)
(1,1)— Bank 3 (18H–17H)
TM Technology Inc. reserves the right
to change products or specifications without notice.
P. 7
Publication Date: JAN. 2006
Revsion : C