tm
TE
CH
T81L0010A
9.2. External Register Table ( for LVR, High/ Normal Driving)
Register Address
Name
Comments
A15…A5-A0
Hex
100… 0010 1011
802bH
PWMC2 LVR (Low Voltage Reset)*
100… 0011 0000
8030H
Port3 HDS Port3 I/O high driving set**
100… 0011 0010
8032H
Port1 HDS Port1 I/O high driving set**
Note :
*
LVR (Low Voltage Reset) address : 802bH, read/write
MSB
Bit 7
Bit 6
Bit5
Bit 4
Bit 3
Bit 2
Bit1
LVR[7]
Reserved
LVR[7] : if LVR[7] write ‘1’, low voltage reset function enable(under 2.1V reset).
default is ‘0’, low voltage reset function disable.
LSB
Bit 0
** Port I/O high driving set
if write ‘0’ = set I/O to high driving current mode.
if write ‘1’ = set I/O to normal driving current mode.
default is set ‘1’.
Port 3 high driving address : 8030H
MSB
Bit 7
Bit 6
Bit5
Port3.7
Port3.5
Port 1 high driving address : 8032H
MSB
Bit 7
Bit 6
Bit5
Port1.7
Port1.6
Port1.5
Bit 4
Port3.4
Bit 3
Port3.3
Bit 2
Port3.2
Bit1
Port3.1
LSB
Bit 0
Port3.0
Bit 4
Port1.4
Bit 3
Port1.3
Bit 2
Port1.2
Bit1
Port1.1
LSB
Bit 0
Port1.0
9.3. I/O Ports
Port1
Port 1 is an 8-bit bi-directional I/O port with internal pull-ups. Port 1 output buffers can sink/source four external TTL
device inputs. When port 1 pins are written as 1’s, these pins are pulled high by the internal pull-ups and can be used as
inputs. As inputs, Port 1 pins that are externally being pulled low will source current because of the internal pull-ups.
Port 3
Port 3 is an 8-bit bi-directional I/O port with internal pull-ups. Port 3 output buffers can sink/source four external TTL
device inputs. When port 3 pins are written as 1’s, these pins are pulled high by the internal pull-ups and can be used as
inputs. As inputs, Port 3 pins that are externally being pulled low will source current because of the internal pull-ups.
Port 3 also serves the functions of various special features, as listed below:
P3.0 RXD (serial input port)
P3.1 TXD (serial output port)
P3.2 INT0 (external interrupt 0)
P3.3 INT1 (external interrupt 1)
P3.4 T0 (timer 0 external input)
P3.5 T1 (timer 1 external input)
P3.7 General purpose I/O only
TM Technology Inc. reserves the right
to change products or specifications without notice.
P. 9
Publication Date: JAN. 2006
Revision:B
TMT [ TAIWAN MEMORY TECHNOLOGY ]
