TK83854
APPLICATION INFORMATION
A 250 W PREREGULATOR
Figure 1 shows a typical application of the TK83854 as a
preregulator with high power factor and efficiency. The
assembly consists of two distinct parts, the control circuit
centering on the TK83854 and the power section.
The power section is a "boost" converter, with the inductor
operating in the continuous mode. In this mode, the duty
cycle is dependent on the ratio between input and output
voltages. Also, the input current has low switching frequency
ripple, which means that the line noise is low. Furthermore,
the output voltage must be higher than the peak value of
the highest expected AC line voltage, and all components
must be rated accordingly.
In the control section, the TK83854 provides PWM pulses
to the power MOSFET gate (GTDRV, Pin 16). The duty
cycle of this output is simultaneously controlled by four
separate inputs to the chip:
INPUT
V
SENSE
IAC
I
SENSE
/MULT
OUT
V
RMS
PIN #
11
6
4/5
8
FUNCTION
Output DC Voltage
Line Voltage Waveform
Line Current
RMS Line Voltage
Soft-Start (SS)
The voltage at Pin 13 (SS) can reduce the reference
voltage used by the error amplifier to regulate the output
DC voltage. With Pin 13 open, the reference voltage is
typically 7.5 V. An internal current source delivers
approximately 14
µA
from Pin 13. Thus, a capacitor
connected between that pin and GND will charge linearly
from zero to 7.5 V in 0.54 x C seconds, with C expressed
in microfarads.
Peak Current Limit (PKLMT)
Use Pin 2 to establish the highest value of current to be
controlled by the power MOSFET. With the resistor divider
values shown in Figure 1, the 0.0 V threshold at Pin 2 is
reached when the voltage drop across the 0.25
Ω
current
sense resistor is 7.5 V x 1.6 k / 10 k = 1.2 V, corresponding
to 4.8 A. A bypass capacitor from Pin 2 to ground is
recommended to filter out very high frequency noise.
CONTROL INPUTS
Output DC Voltage Sense (V
SENSE
)
The threshold voltage for the V
SENSE
input is 7.5 V and the
input bias current is typically -10 nA. The values shown in
Figure 1 are for an output voltage of 400 VDC. In this
circuit, the voltage amplifier operates with a constant low
frequency gain for minimum output excursions. The
0.047
µF
feedback capacitor places a 15 Hz pole in the
voltage loop that prevents 120 Hz ripple from propagating
to the output current.
Line Waveform (IAC)
In order to force the line current waveshape to follow the
line voltage, a sample of the power line voltage waveform
is introduced at Pin 6. This signal is multiplied by the output
of the voltage amplifier in the internal multiplier to generate
a reference signal for the current control loop.
This input is not a voltage, but a current (hence IAC). It is
set up by the 220 k and 910 k resistive divider (see Figure
1). The voltage at pin 6 is internally held at 6 V, and the two
resistors are chosen so that the current flowing into pin 6
varies from zero (at each zero crossing) to about 400
µA
at the peak of the waveshape. The following formulas were
Additional controls of an auxiliary nature are provided.
They are intended to protect the switching power MOSFET
from certain transient conditions, as follows:
INPUT
ENA
SS
PKLMT
PIN #
10
13
2
FUNCTION
Start-up Delay
Soft Start
Maximum Current Limit
PROTECTION INPUTS
Enable (ENA)
The ENA input must reach 2.5 V before the V
ref
and
GTDRV outputs are enabled. This provides a means to
shut down the gate in case of trouble, or to add a time delay
at power up. A hysteresis gap of 200 mV is provided at this
terminal to prevent erratic operation. Undervoltage
protection is provided directly at Pin 15, where the on/off
thresholds are 16 V and 10 V, respectively.
January 1999 TOKO, Inc.
Page 9
TOKO [ TOKO, INC ]
