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TC74LCX138FT 参数 Datasheet PDF下载

TC74LCX138FT图片预览
型号: TC74LCX138FT
PDF下载: 下载PDF文件 查看货源
内容描述: 低电压3至8线译码器与5V容限输入和输出 [Low-Voltage 3-to-8 Line Decoder with 5-V Tolerant Inputs and Outputs]
分类和应用: 解码器驱动器逻辑集成电路光电二极管输入元件PC
文件页数/大小: 11 页 / 286 K
品牌: TOSHIBA [ TOSHIBA SEMICONDUCTOR ]
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TC74LCX138F/FN/FT/FK
TOSHIBA CMOS Digital Integrated Circuit
Silicon Monolithic
TC74LCX138F,TC74LCX138FN,TC74LCX138FT,TC74LCX138FK
Low-Voltage 3-to-8 Line Decoder with 5-V Tolerant Inputs and Outputs
The TC74LCX138 is a high-performance CMOS 3-to-8 decoder.
Designed for use in 3.3-V systems, it achieves high-speed
operation while maintaining the CMOS low-power dissipation.
The device is designed for low-voltage (3.3 V) V
CC
applications,
but it could be used to interface to 5-V supply environment for
inputs.
When the device is enabled, 3 binary select inputs (A, B and C)
determine which one of the outputs (
Y0
-
Y7
) will go low.
When enable input G1 is held low or either
G2A
or
G2B
is
held high, decoding function is inhibited and all outputs go high.
G1,
G2A
, and
G2B
inputs are provided to ease cascade
connection and for use as an address decoder for memory
systems.
All inputs are equipped with protection circuits against static
discharge.
Note: xxxFN (JEDEC SOP) is not available in
Japan.
TC74LCX138F
TC74LCX138FN
Features
Low-voltage operation: V
CC
=
2.0 to 3.6 V
High-speed operation: t
pd
=
6.0 ns (max) (V
CC
=
3.0 to 3.6 V)
Ouput current: |I
OH
|/I
OL
=
24 mA (min) (V
CC
=
3.0 V)
Latch-up performance:
−500
mA
Available in JEDEC SOP, JEITA SOP, TSSOP and
VSSOP (US)
Power-down protection provided on all inputs and outputs
Pin and function compatible with the 74 series
(74AC/VHC/HC/F/ALS/LS etc.) 138 type
TC74LCX138FK
TC74LCX138FT
Weight
SOP16-P-300-1.27A
SOL16-P-150-1.27
TSSOP16-P-0044-0.65A
VSSOP16-P-0030-0.50
: 0.18 g (typ.)
: 0.12 g (typ.)
: 0.06 g (typ.)
: 0.02 g (typ.)
1
2007-10-19