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TC74VHC139FT 参数 Datasheet PDF下载

TC74VHC139FT图片预览
型号: TC74VHC139FT
PDF下载: 下载PDF文件 查看货源
内容描述: 双路2至4线解码器 [Dual 2-to-4 Line Decoder]
分类和应用: 解码器驱动器逻辑集成电路光电二极管PC
文件页数/大小: 9 页 / 221 K
品牌: TOSHIBA [ TOSHIBA SEMICONDUCTOR ]
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TC74VHC139F/FN/FT/FK
TOSHIBA CMOS Digital Integrated Circuit
Silicon Monolithic
TC74VHC139F,TC74VHC139FN,TC74VHC139FT,TC74VHC139FK
Dual 2-to-4 Line Decoder
The TC74VHC139 is an advanced high speed CMOS 2 to 4
LINE DECODER/DEMULTIPLEXER fabricated with silicon
gate C2MOS technology.
It achieves the high speed operation similar to equivalent
Bipolar Schottky TTL while maintaining the CMOS low power
dissipation.
The active low enable input can be used for gating or it can be
used as a data input for demultiplexing applications.
When the enable input is held High, all four outputs are fixed
at a high logic level independent of the other inputs.
An input protection circuit ensures that 0 to 5.5 V can be
applied to the input pins without regard to the supply voltage.
This device can be used to interface 5 V to 3 V systems and two
supply systems such as battery back up. This circuit prevents
device destruction due to mismatched supply and input voltages.
Note: xxxFN (JEDEC SOP) is not available in
Japan.
TC74VHC139F
TC74VHC139FN
Features
High speed: t
pd
=
5.0 ns (typ.) at V
CC
= 5 V
Low power dissipation: I
CC
=
4
μA
(max) at Ta
=
25°C
High noise immunity: V
NIH
=
V
NIL
=
28% V
CC (min)
Power down protection is provided on all inputs.
Balanced propagation delays: t
pLH
t
pHL
Wide operating voltage range: V
CC (opr)
=
2 V to 5.5 V
Pin and function compatible with 74ALS139
TC74VHC139FT
Pin Assignment
TC74VHC139FK
1G
1
2
3
4
5
6
7
8
(top view)
16
15
14
13
12
11
10
9
V
CC
1A
1B
2G
2A
2B
2Y0
2Y1
2Y 2
2Y3
1Y0
1Y1
1Y 2
1Y3
GND
Weight
SOP16-P-300-1.27A
SOL16-P-150-1.27
TSSOP16-P-0044-0.65A
VSSOP16-P-0030-0.50
: 0.18 g (typ.)
: 0.13 g (typ.)
: 0.06 g (typ.)
: 0.02 g (typ.)
1
2008-05-01