T1L2003028-SP
30 W, 28V, 500 MHz—2 GHz, Powerband
TM
LDMOS RF Power Transistor
Introduction
The T1L2003028-SP is a POWERBAND
TM
discrete LDMOS,
enhancement mode RF Power transistor designed to operate
from 500MHz to 2GHz in wide-band circuits. The device has an
instantaneous band-width P1dB output power of 30watts across
the entire band when operated in the TriQuint wide-band test
fi
xture. The T1L2003028-SP can also be used in narrow band ap-
plications and is rated at 45Watts P1dB at 2GHz.
Figure 1. Available Packages
Table 1. Thermal Characteristics
Parameter
Thermal Resistance,
Junction to Case:
Sym
R_ JC
Value
1.3
Unit
°C/W
Table 2. Absolute Maximum Ratings*
Parameter
Drain-source Voltage
Gate-source Voltage
Drain Current—Continuous
Total Dissipation at TC = 25 °C:
T1L2003028-SP
Derate Above 25 °C:
T1L2003028-SP
Operating Junction Temperature
Storage Temperature Range
—
TJ
TSTG
0.77
200
–65, +150
W/°C
°C
°C
PD
135
W
Sym
VDSS
VGS
ID
Value
65
–0.5, +15
4.25
Unit
Vdc
Vdc
Adc
* Stresses in excess of the absolute maximum ratings can cause permanent dam-
age to the device. These are absolute stress ratings only. Functional operation of
the device is not implied at these or any other conditions in excess of those given
in the operational sections of the data sheet. Exposure to absolute maximum
ratings for extended periods can adversely affect device reliability.
Table 3. ESD Rating*
T1L2003028-SP
HBM
MM
Minimum (V)
500
50
1500
Class
1B
A
4
Features
— Exceptional Instantaneous band-width performance from
500MHz – 2GHz
— Increased efficiency results in significant advantages
— Smaller and lighter systems
— Reduced system component costs
— Reduced energy consumption
— Typical Performance ratings
— Wide-Band 500MHz-2GHz
(as tested in TriQuint Wideband Fixture)
— 10dB gain
— 45% Efficiency
— 30Watt P1dB
— Narrow Band up to 2GHz
— 14dB gain
— 59% efficiency
— 45Watt P1dB
CDM
* Although electrostatic discharge (ESD) protection circuitry has been designed
into this device, proper precautions must be taken to avoid exposure to ESD and
electrical overstress (EOS) during all handling, assembly, and test operations.
Agere employs a human-body model (HBM), a machine model (MM), and a
charged-device model (CDM) qualification requirement in order to determine
ESD-susceptibility limits and protection design evaluation. ESD voltage thresholds
are dependent on the circuit parameters used in each of the models, as defined
by JEDEC’s JESD22-A114B (HBM), JESD22-A115A (MM), and JESD22-C101A (CDM)
standards.
Caution:
MOS devices are susceptible to damage from electrostatic charge.
Reasonable precautions in handling and packaging MOS devices
should be observed.
Preliminary Data Sheet
Subject to Change
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