TQ5121
Data Sheet
TQ5121 Product Description
The TQ5121 3V RFIC Downconverter is designed specifically
for cellular band TDMA applications. The TQ5121 contains a
LNA+Mixer circuit to handle the 800 MHz cellular band. The IF
frequency range covers 70 to 140 MHz with most of the ports
internally matched to 50
Ω
simplifying the design and keeping
the number of external components to a minimum.
Fig 2. Suggested LNA Input Match
RF
IN
1.2pF
Pin 7
10nH
Note: These values assume ideal components and neglect board parasitic.
The discrepancy between these values and those of the typical application
circuit are the board and component parasitic
Operation
Please refer to the test circuit above.
Low Noise Amplifier (LNA)
The LNA section of the TQ5121 consists of a cascaded
common source FETs (see Fig 1). The LNA is designed to
operate on supply voltages from 3V to 5V. The source terminal
has to be grounded very close to the pin, this will avoid a
significant gain reduction due to degeneration. The LNA
requires a matching circuit on the input to provide superior
noise, gain and return loss performance. The output is close to
50
Ω
for direct connection to a 50
Ω
image stripping filter.
Vdd
Fig 1. TQ5121
Simplified
Schematic of
LNA Section
LNA
in
BIAS
BIAS
presented to the input pin. Highest gain and lowest return loss
occur when
Γ
s
is equal to the complex conjugate of the LNA
input impedance. A different source reflection coefficient,
Γ
opt
,
which is experimentally determined, will provide the lowest
possible noise figure, F
min
.
The noise resistance, R
n
, provides an indication of the sensitivity
of the noise performance to changes in
Γ
s
as seen by the LNA
input.
4
R
N
Γ
opt
− Γ
S
⋅
F
LNA
=
F
MIN
+
Z
0
1
+ Γ
opt
2
⋅
1
− Γ
s
2
2
(
)
Components such as filters and mixers placed after the LNA
degrade the overall system noise figure according to the
following equation:
LOAD
LNA
out
F
SYSTEM
=
F
LNA
+
F
2
−
1
G
LNA
LNA Input Match
To obtain the best possible combination of performance and
flexibility, the LNA was designed to be used with off-chip
impedance matching on the input. Based on the system
requirements, the designer can make several performance
trade-offs and select the best impedance match for the
particular application.
The input matching network primarily determines the noise and
gain performance. Fig 2 shows a suggested input match using
a series 1.2pF capacitor and a shunt 10nH inductor.
The LNA gain, noise figure and input return loss are a function
of the source impedance (Z
s
), or reflection coefficient (Γ
s
),
F
LNA
and
G
LNA
represent the linear noise factor and gain of the
LNA and
F
2
is the noise factor of the next stage. Thus, the
system noise figure depends on the highest gain and minimum
noise figure of the LNA.
Designing the input matching network involves a compromise
between optimum noise performance and best input return loss.
For example, when the TQ5121 LNA is matched for optimum
noise figure (1.35dB @ 880 MHz), the input return loss is
approximately 4dB. On the other hand, when the LNA is
matched for best return loss, the LNA noise figure is
approximately 1.95dB @ 881 MHz. See Table 1 for noise
parameters.
For additional information and latest specifications, see our website:
www.triquint.com
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