Preliminary
Pin No.
1
2
Name
GND
FB
Pin Function
Ground.
uP7718
Functional Pin Description
Feedback Voltage.
This pin is the inverting input to the error amplifier. A resistor divider from
the output to GND is used to set the regulation voltage as V
OUT
= 0.8x(R1+R2)/R1 (V)
Output Voltage.
This pin is power output of the device. A pull low resistance exists when the
device is disabled by pulling low the EN pin. To maintain adequate transient response to large
load change, typical value of 1000uF Al electrolytic capacitor with 10uF ceramic capacitors are
recommended to reduce the effects of current transients on VOUT.
Input Voltage.
This is the drain input to the power device that supplies current to the output pin.
Large bulk capacitors with low ESR should be placed physically close to this pin o prevent the
input rail from dropping during large load transient. A 4.7uF ceramic capacitor is recommended
at this pin. V
IN
cannot be forced higher than V
CNTL
otherwise the current limit function may be false
triggered and disable the output voltage.
Supply Input for Control Circuit.
This pin provides bias voltage to the control circuitry and
driver for the pass transistor.The driving capability of output current is proportioned to the V
CNTL
.
For the device to regulate, the voltage on this pin must be at least 1.5V greater than the output
voltage, and no less than V
CNTL_MIN.
Pow er OK Indication.
This pin is an open-drain output and is set high impedance once V
OUT
reaches 90% of its rating voltage.
Enable Input.
Pulling this pin below 0.5V turns the regulator off, reducing the quiescent current
to a fraction of its operating value.
Connected to VIN plane for better heat dissipation.
3, 4
VOUT
5
VIN
6
CNTL
7
8
POK
EN
Exposed Pad
Functional Block Diagram
EN
CNTL
VIN
Thermal Limit
Power On
Reset
Softstart &
Control Logic
Current Limit
FB
0.8V
VOUT
Delay
90% V
REF
POK
GND
uPI Semiconductor Corp., http://www.upi-semi.com
Rev. P00, File Name: uP7718-DS-P0000
2