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Lead (Pb)-free Thick Film, Rectangular Chip Resistors
Vishay
TEST PROCEDURES AND REQUIREMENTS
EN 60115-1
REQUIREMENTS
PERMISSIBLE CHANGE (ΔR/R)
TEST (clause)
CONDITIONS OF TEST
STABILITY CLASS 1 STABILITY CLASS 2
OR BETTER
OR BETTER
SIZE 0201 ONLY
REQUIREMENTS
PERMISSIBLE
CHANGE (ΔR/R)
stability for product types:
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Resistance (4.5)
Temperature coefficient
(4.8.4.2)
Overload (4.13)
-
20/- 55/20 °C and
20/125/20 °C
U
= 2.5 × (P
70
×
R)
1/2
≤
2 ×
U
max
;
Duration: according the style
Aging 4 h at 155 °C, dryheat
Solder bath method; 235 °C; 2 s
Visual examination
Solder bath method;
(260 ± 5) °C; (10 ± 1) s
30 min. at LCT = - 55 °C;
30 min. at UCT = 125 °C; 5 cycles
(40 ± 2) °C; 56 days;
(93 ± 3) % RH
16 h at UCT = 125 °C; 1 cycle at 55 °C;
2 h at LCT = - 55 °C;
1 h/1 kPa at 15 °C to 35 °C;
5 cycles at 55 °C
U
= (P
70
×
R)
1/2
U
=
U
max
; whichever is less severe
U
= (P
70
×
R)
1/2
U
=
U
max
; whichever is less severe
1.5 h on; 0.5 h off;
70 °C; 1000 h
Duration extended to 8000 hours
1
Ω
to 10 MΩ
±1%
± 100 ppm/K
±
(0.25
%
R
+ 0.05
Ω)
1
Ω
to 10 MΩ
±5%
± 200 ppm/K
±
(0.5
%
R
+ 0.05
Ω)
10
Ω
to 1 MΩ
± 1 %; ± 5 %
± 200 ppm/K
±
(1
%
R
+ 0.05
Ω)
Solderability (4.17.5)
Resistance to soldering
heat (4.18.2)
Rapid change of
temperature (4.19)
Damp heat, steady state
(4.24)
Good tinning (≥ 95 % covered)
no visible damage
±
(0.25
%
R
+ 0.05
Ω)
±
(0.25
%
R
+ 0.05
Ω)
±
(1
%
R
+ 0.05
Ω)
±
(0.5
%
R
+ 0.05
Ω)
±
(0.5
%
R
+ 0.05
Ω)
±
(2
%
R
+ 0.1
Ω)
±
(1
%
R
+ 0.05
Ω)
±
(0.5
%
R
+ 0.05
Ω)
±
(2
%
R
+ 0.1
Ω)
Climatic sequence (4.23)
±
(1
%
R
+ 0.05
Ω)
±
(2
%
R
+ 0.1
Ω)
±
(2
%
R
+ 0.1
Ω)
Endurance at 70 °C
(4.25.1)
Extended endurance
(4.25.1.8)
Endurance at upper
category temperature
(4.25.3)
±
(1
%
R
+ 0.05
Ω)
±
(2
%
R
+ 0.1
Ω)
±
(3
%
R
+ 0.1
Ω)
± (2 %
R
+ 0.1
Ω)
± (1 %
R
+ 0.05
Ω)
± (4 %
R
+ 0.1
Ω)
± (2 %
R
+ 0.1
Ω)
± (4 %
R
+ 0.1
Ω)
± (2 %
R
+ 0.1
Ω)
UCT = 125 °C; 1000 h
APPLICABLE SPECIFICATIONS
• EN 60115-1
• EN 140400
• EN 140401-802
• IEC 60068-2-X
• IEC 60286-3
Generic Specification
Sectional Specification
Detail Specification
Variety of environmental test procedures
Packaging of SMD components
Document Number: 20035
Revision: 04-Jul-07
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For technical questions in Americas/Asia, contact: ff2bresistors@vishay.com
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