Advance Information
Advance Information
VT98501
VT98501
Low Phase Noise Clock Multiplier
3.3V Low Phase Noise Clock Multiplier
Applications
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Oscillator Replacement
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LCD monitor clock source
General Description
The VT98501 is a 3.3V CMOS, clock multiplier integrated circuit. The device provides an excellent quality
high frequency output clock from a lower frequency crystal or clock input. Tri-level selection inputs S0 and
S1 are used to select any one of nine multipliers, stored in the on-board ROM, and apply it to the input to
produce the desired output. The resulting output includes many commonly used frequencies up to 160
MHz. Phase Locked Loop (PLL) technology allows the device to use an input signal from an inexpensive
crystal.
When Output Enable (OE) is low, the clock output is in high impedance state.
The VT98501, when used with an inexpensive crystal, provides a cost-effective clock source for most
electronic systems.
Features
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Low phase noise
Zero ppm multiplication error
Input clock frequency 2 - 50 MHz.
Input crystal frequency 5 – 27 MHz
Output clock frequencies up to 160 MHz.
5V tolerant inputs and output
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Exceptionally low jitter: 25 ps one sigma
Fully Compatible with all popular CPUs
Duty Cycle of 45/55 up to 160 MHz.
25mA drive capability at TTL levels
High-Z output for board level testing
Figure 1. Functional Block Diagram
Figure 2. Pin Assignment
VDD
GND
8-pin SOIC
S0
S1
Clock or
Xtal
X1/ICLK
input
PLL
Clock
Multiplier
&
ROM
Xtal.
Osc.
Output
Buffer
CLK
X1/ICLK
VDD
GND
S1
1
2
3
4
8
7
6
5
X2
OE
S0
CLK
X2
Optional
caps
Output Enable
2001-03-05
Vaishali Semiconductor
Page 1
1300 White Oaks Road, Ste. 200
Campbell
CA 95008
Ph. 408.377.6060
MDST-0009-00
Fax 408.377.6063
VAISH [ VAISHALI SEMICONDUCTOR ]
