VT98521
Table 1. Clock Output Table
S1
0
0
0
M
M
M
1
1
1
S0
0
M
1
0
M
1
0
M
1
CLK
4 x input
5.3125 x input
5 x input
6.25 x input
Test*
3.125 x input
6 x input
3 x input
8 x input
Minimum Input
See table 6
20 MHz
See table 6
4 MHz
8 MHz
See table 6
See table 6
See table 6
0 = Connect to ground.
1 = Connect directly to VDD
M = Leave unconnected (floating)
* = For Vaishali internal test purposes only
Table 2. Pin Description
No.
1
2
3
4
5
6
7
8
Name
X1/ICLK
VDD
GND
S1
CLK
S0
OE
X2
Type
I
P
P
TI
O
TI
I
O
Description
Xtal connection or clock input.
Connect to +3.3V
Connect to ground.
Select 1 for output clock. Connect to ground or VDD or float
Clock output per table 2.
Select 0 for output clock. Connect to ground or VDD or float.
Output Enable. Tri- states CLK output when low.
Xtal connection. Leave unconnected for clock input.
Legend:
I = Input
TI = Tri-level Input
O = Output
P = Power supply connection
Table 3. Absolute Maximum Ratings
Parameter
Supply voltage, VDD
Inputs and Clock Outputs
Soldering Temperature
Storage temperature
Conditions
Referenced to GND
Referenced to GND
Max of 10 seconds
Min
-0.5
Typ
Max
4.6
4.6
260
Units
V
V
°C
°C
-65
150
2002-02-25
Vaishali Semiconductor
Page 2
www.vaishali.com
747 Camden Avenue, Suite C Campbell
MDST-0017-02
CA 95008
Ph. 408.377.6060
Fax 408.377.6063