VITESSE
SEMICONDUCTOR CORPORATION
Preliminary Datasheet
2.488 Gbit/sec to 2.7Gbit/sec
1:16 SONET/SDH Demux
VSC8164
Package Information
128 PQFP Package Drawings
PIN 128
PIN 1
PIN 102
Key
mm
Tolerance
RAD. 2.92 ± .50
A
A1
A2
D
2.35
0.25
2.00
17.20
14.00
23.20
20.00
.88
MAX
MAX
+.10
(2)
E
E
1
±.20
D1
E
±.10
EXPOSED
INTRUSION
0.127 MAX.
±.20
2.54 ± .50
E1
L
±.10
EXPOSED
HEATSINK
+.15/-.10
BASIC
±.05
e
.50
PIN 38
b
.22
PIN 64
D
1
θ
0°-7°
.30
R
TYP
TYP
D
TOP VIEW
R1
.20
10° TYP.
A
2
A
A
1
e
10° TYP.
R
R1
θ1
STANDOFF
A
1
.25
A
Notes: 1) Drawing is not to scale
2) All dimensions in mm
3) Package represented is
also used for the 64,
θ
b
MAX.
0.17
LEAD COPLANARITY
80, & 100 PQFP packages.
Pin count drawn does
NOTES:
not reflect the 128 Package.
Package #: 101-322-5
Issue #: 2
L
Page 12
VITESSE SEMICONDUCTOR CORPORATION
741 Calle Plano, Camarillo, CA 93012 • 805/388-3700 • FAX: 805/987-5896
G52239-0, Rev. 3.3
5/17/00
VITESSE [ VITESSE SEMICONDUCTOR CORPORATION ]
