VSC3139
4.2 Gbps 72 x 72 Asychronous Crosspoint Switch
GENERAL DESCRIPTION:
The VSC3139 is a 72x72 asynchronous
crosspoint switch, designed to carry
broadband data streams. The fully non-
blocking switch core is programmed
through a multi-mode port interface that
allows random access programming of each
input/output port. A high degree of signal integrity is maintained
throughout the chip by fully differential signal paths.
Each data output can be programmed to connect to one of the
72 inputs. The signal path is unregistered and fully
asynchronous, so there are not any restrictions on the phase,
frequency, or signal pattern on any input. Each high-speed
output is a fully differential switched current driver with on-
die terminations for maximum signal integrity. Data inputs are
terminated on die through 100Ω resistors between true and
complement inputs with a common connection to an internal
bias source, facilitating AC-coupling to the switch inputs.
A multi-mode, programming interface is provided that allows
commands to be sent as serial data or multiplexed parallel
data. Core programming can be sequential on a port by port
basis, or multiple program assignments can be queued and
issued simultaneously using the CONFIG bit. The INIT feature
will reset the entire switch into a "straight-through" configuration
(A0 to Y0, A1 to Y1, etc.) or it can be programmed by the user to
initialize to any other configuration. Programming of the
VSC3139 is via an 11-bit multiplexed ADDR/DATA bus in
conjunction with the ALE, RD, WR, CONFIG and INIT pins.
Additionally, the CONFIG and INIT signals can be set via an
internal control register to reduce the number of signals
required to interface with the switch. To lock-in programming
of switch connections, INIT, and CONFIG can be disabled
through software.
Unused channels may be powered down to allow efficient
use of the switch in applications that require only a subset of
the channels. Power-down is enabled in software by
programming individual unused outputs with a power-down
code. A secondary access port allows asynchronous
readback and configuration control to take place while the
primary programming port is in use.
EYE OPENER INPUT SIGNAL EQUALIZATION PERFROMANCE:
Signal through 50” of microstrip trace
Signal output with ISE enabled
Signal through 150” of microstrip trace
Signal output with ISE enabled
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at www.vitesse.com or contact Vitesse Sales at (800) VITESSE
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Vitesse, ASIC-Friendly, FibreTimer, TimeStream and Snoop Loop are trademarks of Vitesse Semiconductor Corporation.
All other trademarks or registered trademarks mentioned herein are the property of their respective holders. Vitesse
Semiconductor Corporation ("Vitesse") retains the right to make changes to its products or specifications to improve
performance, reliability or manufacturability. All information in this document, including descriptions of features,
functions, performance, technical specifications and availability, is subject to change without notice at any time.
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