DATA INTERCONNECT
VSC3172
6.5 Gbps 72 × 72 Asynchronous Crosspoint Switch
BLOCK DIAGRAM:
Switch Core
Inputs [71:0]
EQ
EQ
Outputs [71:0]
VSC3172
Programming Interface
F E AT U R E S :
6.5 Gbps 72 × 72 strictly nonblocking switch matrix with multicast and
output striping programming modes
Fourth-generation input signal equalization (ISE) with programmable
control globally or on a per-channel basis
Adjustable output pre-emphasis EQ
Differential current mode logic (CML) data output driver
Protocol-independent switching and data transmission
10-W typical power dissipation
33 mm × 33 mm, 1.27 mm pin pitch, 613-pin FCBGA package
Parallel and serial programming modes for configuration and monitoring
Software control to optimize power dissipation
BENEFITS:
468-Gbps aggregate bandwidth in a single chip for high-density network
storage, FC, blade server, and Ethernet systems
Addresses system-level and board-level signal integrity (SI) and
intersymbol interface (ISI) jitter issues
EQ and drive flexibility for driving boards, cables, and circuit traces
Convenient I/O flexibility for interfacing with multiple standards
Can be used with latest storage, Ethernet, and networking standards
Low 140-mW per-channel power dissipation
Layout-friendly package and pinout for easier PCB design
Programming and control convenience
Controlled power reduction for unused ports
A P P L I C AT I O N S :
Core and metro transport
Enterprise
Blade servers
High-speed automated test equipment
Broadcast video systems
Storage, Ethernet, and networking equipment
VPPD-01586
Revision 1.0
VITESSE [ VITESSE SEMICONDUCTOR CORPORATION ]
