VITESSE
SEMICONDUCTOR CORPORATION
Data Sheet
VSC7127/VSC7129
Features
• ANSI X3T11 Fibre Channel Compliant
• 1.0625Gb/s Operation
• Features the FibreTimer
™
Configurable Clock
Recovery Unit (CRU): Repeater, Retimer or
Bypassed
• Six Port Bypass Circuits (PBC)
•
Family of Repeater/Retimer and Port
Bypass Circuits for Fibre Channel
Analog/Digital Signal Detect (SDU)
• On-Chip Transmit Termination
•
3.3V, 700mW Power Dissipation
• Compatible with HDMP-0451 (VSC7127) or
HDMP-0452 (VSC7129)
• 44-Pin, 10mm PQFP Package
General Description
The VSC7127 and VSC7129 contain six cascaded Port Bypass Circuits (PBCs), the FibreTimer
™
config-
urable Repeater/Retimer (CRU) and a Signal Detect Unit (SDU). These parts are typically used in distributing
Fibre Channel signals to an array of disk drives in an FC-AL loop as illustrated in Figure 1. The first
VSC7127’s CRU is configured as a Repeater to attenuate jitter, the second VSC7127’s CRU is bypassed to
reduce power and the third VSC7127’s CRU is configured as a retimer so that the output of the device is a jitter-
compliance point.
Each PBC is a multiplexer that is controlled by the corresponding SELx line which, if HIGH, selects the
external input or, if LOW, selects the output of the previous PBC. For the VSC712xR, when MODE is LOW
and SEL5 is HIGH, the CRU is a sophisticated repeater which has low latency, no peaking and attenuates jitter
even at low frequencies. When MODE is HIGH and SEL5 is HIGH, the CRU is a retimer which eliminates jit-
ter transfer but has increased latency due to an elasticity buffer which adds/drops Fibre Channel fill words in
order to accomodate the difference between the baud rate of the incoming data and the local REFCLK. When
SEL5 is LOW, the CRU is bypassed and powered down. The SDU monitors the analog levels of the IO+/- input
and monitors the output of the CRU digitally to indicate whether valid data is present.
The VSC7127/VSC7129 are similar to the VSC7124 which does not contain the FibreTimer
™
cell or CMU.
VSC7127/VSC7129 Block Diagram
O1+
O1-
I1+
I1-
SEL1
O2+
O2-
I2+
I2-
SEL2
O3+
O3-
I3+
I3-
SEL3
O4+
O4-
I4+
I4-
SEL4
O0+
O0-
I0+
I0-
SEL0
1
0
REFCLK
106.25MHz
CMU
1
0
1
0
1
0
1
0
0.1uF
PBC1
SEL5
1
0
PBC2
PBC3
PBC4
PBC0
PBC5
CRU
MODE
SDU
SIGDET
G52298-0, Rev 4.3
05/01/01
©
VITESSE
SEMICONDUCTOR CORPORATION
• 741 Calle Plano • Camarillo, CA 93012
Tel: (800) VITESSE • FAX: (805) 987-5896 • Email: prodinfo@vitesse.com
Internet: www.vitesse.com
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