VITESSE
SEMICONDUCTOR CORPORATION
ATM/SONET/SDH 622 Mb/s Transceiver Mux/Demux
with Integrated Clock Generation and Clock Recovery
Data Sheet
VSC8113
CRU clock and data signals. (In this mode the VSC8113 operates just like the VSC8111). The receive section
also contains a SONET/SDH frame detector circuit which is used to provide frame pluses during the A1, A2
boundary in the serial to parallel converter. This only occurs when OOF is high. Both internal and external LOS
functions are supported.
VSC8113 Block Diagram
EQULOOP
FRAMER
OOF
FP
8
D Q
0
1
0
1
1:8
DEMUX
D Q
RXOUT[7:0]
Divide-by-8
RXLSCKOUT
TXDATAOUT+/-
Q D
1
0
1
8:1
MUX
Q D
8
TXIN[7:0]
TXLSCKIN
Divide-by-8
Divide-by-3/12
1
0
1
0
1
TXLSCKOUT
RX50MCK
LOOPTIM0
TXCLKOUT+/-
FACLOOP
CMULOCKDET
0
DSBLCRU
1
RXDATAIN+/-
CRUEQLP
CRULOCKDET
RXCLKIN+/-
LOSOUT
losdet
CRUREFCLK
1
0
cmurefclk
0
CRU
1
REC-DATA
REC-CLK
CMU
0
REFCLKP+/-
REFCLK
LOOPTIM1
EQULOOP
0
0
1
LOSPECL
LOSTTL
LOSDETEN_
CRUREFSEL
Page 2
©
VITESSE
SEMICONDUCTOR CORPORATION
741 Calle Plano, Camarillo, CA 93012 • 805/388-3700 • FAX: 805/987-5896
G52154-0, Rev 4.2
3/19/99
VITESSE [ VITESSE SEMICONDUCTOR CORPORATION ]
