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VSC8132QR 参数 Datasheet PDF下载

VSC8132QR图片预览
型号: VSC8132QR
PDF下载: 下载PDF文件 查看货源
内容描述: 2.488Gb / s的1点32分的SONET / SDH多路分离器 [2.488Gb/s 1:32 SONET/SDH Demux]
分类和应用: 电信集成电路异步传输模式ATM
文件页数/大小: 14 页 / 124 K
品牌: VITESSE [ VITESSE SEMICONDUCTOR CORPORATION ]
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VITESSE
SEMICONDUCTOR CORPORATION
Preliminary Data Sheet
VSC8132
Features
• 2.488Gb/s 1:32 Demultiplexer
• SONET STS-48/SDH STM-16
• HSPECL Differential Serial Data and Clock
Inputs
• 32-Bit TTL Parallel Data Outputs with Odd/
Even Parity Check
• Frame Detect Synchronization
2.488Gb/s 1:32 SONET/SDH Demux
• 77.76, 51.84, and 38.88MHz TTL Clock Outputs
• Single 3.3V supply
• Loss of Clock Alarm
• Loss of Data Alarm
• 2.05W Max Power Dissipation
• 128-Pin PQFP Package
General Description
The VSC8132 demultiplexes a 2.488Gb/s HSPECL serial input datastream (DI+) to 32-bit wide, TTL
77.76Mb/s parallel data outputs D[31:0] for SONET/SDH applications. A 2.488GHz HSPECL input clock
(CLKI+) is used to time the incoming data and 3 TTL clock outputs, at frequencies of 77.76MHz, 51.84MHz,
and 38.88MHz, are generated for upstream devices (DATACLK78, CLK51, CLK38). Odd or even parity is per-
formed on the incoming high-speed data via the TTL Parity Select input (PARSEL), and a TTL Parity output
(PARITY) is provided to indicate parity of the input data. Frame Detect on the incoming data is controlled via
the Frame Detect Inhibit (OOFN) and Reset (RESET) TTL inputs. A frame detect monitors the incoming data
steam and screens for 2 bits in A1 byte out of the 8 bits and 2 bits of A2 byte out of the 8 bits. When a Frame
Detect occurs, a synchronization TTL output (SYNC) will be set. Alarm indicators are used to monitor the
activity of the clock and data with TTL compatible control inputs (ALMRESET) and outputs (DTALARM,
CKALARM).
Only a single 3.3V power supply is required for device operation. The VSC8132 is packaged in a ther-
mally-enhanced 128-pin, 14x20x2mm PQFP package.
VSC8132 Block DIagram
OOFN
RESET
PARSEL
Framing
and
Parity
DATA[3:0]
SYNC
PARITY
DI+
DI–
CLKI+
CLKI–
DTALARM
Alarms
ALMRESET
CKALARM
DATACLK78
1:32
Demux
Clock
Generation
CLK51
CLK38
G52250-0, Rev 3.1
12/7/00
©
VITESSE
SEMICONDUCTOR CORPORATION
• 741 Calle Plano • Camarillo, CA 93012
Tel: (800) VITESSE • FAX: (805) 987-5896 • Email: prodinfo@vitesse.com
Internet: www.vitesse.com
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