128Mb Synchronous DRAM
128Mb Synchronous DRAM
P2V28S20ATP-7,-75,-8
P2V28S30ATP-7,-75,-8
P2V28S40ATP-7,-75,-8
PRELIMINARY
(4-BANK x 8,388,608-WORD x 4-BIT)
(4-BANK x 4,194,304-WORD x 8-BIT)
(4-BANK x 2,097,152-WORD x 16-BIT)
P2V28S20ATP-7,-75,-8 (4-BANK x 8,388,608-WORD x 4-BIT)
P2V28S30ATP-7,-75,-8 (4-BANK x 4,194,304-WORD x 8-BIT)
P2V28S40ATP-7,-75,-8 (4-BANK x 2,097,152-WORD x 16-BIT)
Some of contents are described for general products and
are subject to change without notice.
DESCRIPTION
P2V28S20ATP is organized as 4-bank x 8,388,608-word x
4-bit Synchronous DRAM with LVTTL interface and
P2V28S30ATP is organized as 4-bank x 4,194,304-word x
8-bit and P2V28S40ATP is organized as 4-bank x 2,097,
152-word x 16-bit. All inputs and outputs are referenced to
the rising edge of CLK.
P2V28S20ATP,P2V28S30ATP and P2V28S40ATP
achieve very high speed data rates up to 166MHz, and are
suitable for main memories or graphic memories in com-
puter systems.
FEATURES
ITEM
tCLK
tRAS
tRCD
tAC
tRC
Icc1
Clock Cycle Time
(Min.)
CL=2
CL=3
-7
-
7ns
45ns
CL=2
CL=3
V28S20D
20ns
-
5.4ns
63ns
85mA
85mA
85mA
1mA
P2V28S20/30/40ATP
-75
-8
10ns
7.5ns
45ns
20ns
6ns
5.4ns
67.5ns
85mA
85mA
85mA
1mA
10ns
8ns
48ns
20ns
6ns
6ns
70ns
85mA
85mA
85mA
1mA
Active to Precharge Command Period (Min.)
(Min.)
Row to Column Delay
Access Time from CLK
Ref /Active Command Period
Operation Current (Single Bank)
(Max.)
(Min.)
(Max.)
V28S30D
V28S40D
-7,-75,-8
Icc6
Self Refresh Current
(Max.)
- Single 3.3V ±0.3V power supply
- Max. Clock frequency -7:143MHz<3-3-3>/-75:133MHz<3-3-3>/-8:100MHz<2-2-2>
- Fully synchronous operation referenced to clock rising edge
- 4-bank operation controlled by BA0,BA1(Bank Address)
- /CAS latency- 2/3 (programmable)
- Burst length- 1/2/4/8/FP (programmable)
- Burst type- Sequential and interleave burst (programmable)
- Byte Control- DQML and DQMU (P2V28S40ATP)
- Random column access
- Auto precharge / All bank precharge controlled by A10
- Auto and self refresh
- 4096 refresh cycles /64ms
- LVTTL Interface
- Package
P2V28S20ATP/30ATP/40ATP
400-mil, 54-pin Thin Small Outline (TSOP II) with 0.8mm lead pitch
JULY.2000
Page-1
Rev.2.2
VML [ VANGUARD INTERNATIONAL SEMICONDUCTOR ]
