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EDI88512CA-RP 参数 Datasheet PDF下载

EDI88512CA-RP图片预览
型号: EDI88512CA-RP
PDF下载: 下载PDF文件 查看货源
内容描述: 512Kx8塑料单片CMOS SRAM [512Kx8 Plastic Monolithic SRAM CMOS]
分类和应用: 静态存储器
文件页数/大小: 7 页 / 194 K
品牌: WEDC [ WHITE ELECTRONIC DESIGNS CORPORATION ]
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White Electronic Designs
512Kx8 Plastic Monolithic SRAM CMOS
FEATURES
512Kx8 bit CMOS Static
Random Access Memory
• Access Times of 17, 20, 25ns
• Data Retention Function (LPA version)
• Extended Temperature Testing
• Data Retention Functionality Testing
36 lead JEDEC Approved Revolutionary Pinout
• Plastic SOJ (Package 319)
Single +5V (±10%) Supply Operation
EDI88512CA-RP
WEDC's ruggedized plastic 512Kx8 SRAM that allows
the user to capitalize on the cost advantage of using a
plastic component while not sacrificing all of the reliability
available in a full military device.
Extended temperature testing is performed with the test
patterns developed for use on WEDC’s fully compliant
512Kx8 SRAMs. WEDC fully characterizes devices
to determine the proper test patterns for testing at
temperature extremes. This is critical because the
operating characteristics of device change when it is
operated beyond the commercial guarantee a device that
operates reliably in the field at temperature extremes.
Users of WEDC’s ruggedized plastic benefit from WEDC’s
extensive experience in characterizing SRAMs for use in
military systems.
WEDC ensures Low Power devices will retain data in Data
Retention mode by characterizing the devices to determine
the appropriate test conditions. This is crucial for systems
operating at -40°C or below and using dense memories
such as 512Kx8s.
WEDC’s ruggedized plastic SOJ is footprint compatible
with WEDC’s full military ceramic 36 pin SOJ.
FIG. 1 – PIN CONFIGURATION
PIN Description
TOP VIEW
A0
A1
A2
A3
A4
CS#
I/O0
I/O1
VCC
VSS
I/O2
I/O3
WE#
A5
A6
A7
A8
A9
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
NC
A18
A17
A16
A15
OE#
I/O7
I/O6
VSS
VCC
I/O5
I/O4
A14
A13
A12
A11
A10
NC
I/O
0-7
A
0-18
WE#
CS#
OE#
Data Inputs/Outputs
Address Inputs
Write Enables
Chip Selects
Output Enable
Power (+5V ±10%)
Ground
BLOCK DIAGRAM
V
CC
V
SS
36pin
Revolutionary
NC
Memory Array
Not Connected
A
Ø-18
Address
Buffer
Address
Decoder
I/O
Circuits
I/O
Ø-7
WE#
CS#
OE#
May 2004
Rev. 6
1
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com