EDI8L3265C
64Kx32 SRAM
AC Characteristics Read Cycle
Parameter
Read Cycle Time
Address Access Time
Chip Enable Access Time
Byte Select Access Time
Chip Enable to Output in Low Z (1)
Byte Select to Output in Low Z
Chip Disable to Output in High Z (1)
Byte Select to Output in High Z
Output Hold from Address Change
Output Enable to Output Valid
Output Enable to Output in Low Z (1)
Output Disable to Output in High Z(1)
Note 1: Parameter guaranteed, but not tested.
* Advanced Information
Symbol
12ns*
JEDEC
Alt.
Min Max
TAVAV
TRC 12
TAVQV
TAA
12
TELQV
TACS
12
TBLQV
TBA
12
TELQX
TCLZ 3
TBLQX
TBLZ 3
TEHQZ
TCHZ
7
TBHQZ
TBHZ
7
TAVQX
TOH
3
TGLQV
TOE
5
TGLQX
TOLZ 2
TGHQZ
TOHZ
4
15ns
Min Max
15
15
15
15
3
3
8
8
3
6
2
5
20ns
Min Max
20
20
20
20
3
3
10
10
3
8
2
8
25ns
Min Max
25
25
25
25
3
3
10
10
3
10
0
10
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Read Cycle 1 - W High, G, E Low
Read Cycle 2 - W High
3
White Electronic Designs Corporation (602) 437-1520 www.whiteedc.com
WEDC [ WHITE ELECTRONIC DESIGNS CORPORATION ]
