White Electronic Designs
SYNC BURST – TRUTH TABLE
Operation
Deselected Cycle, Power Down; Bank 1
Deselected Cycle, Power Down; Bank 2
Read Cycle, Begin Burst; Bank 1
Read Cycle, Begin Burst; Bank 1
Read Cycle, Begin Burst, Bank 2
Read Cycle, Begin Burst; Bank 2
Write Cycle, Begin Burst; Bank 1
Write Cycle, Begin Burst; Bank 2
Read Cycle, Begin Burst; Bank 1
Read Cycle, Begin Burst; Bank 1
Read Cycle, Begin Burst; Bank 2
Read Cycle, Begin Burst; Bank 2
Read Cycle, Continue Burst; Bank 1
Read Cycle, Continue Burst; Bank 1
Read Cycle, Continue Burst; Bank 2
Read Cycle, Continue Burst; Bank 2
Read Cycle, Continue Burst; Bank 1
Read Cycle, Continue Burst; Bank 1
Read Cycle, Continue Burst; Bank 2
Read Cycle, Continue Burst; Bank 2
Write Cycle, Continue Burst; Bank 1
Write Cycle, Continue Burst; Bank 1
Write Cycle, Continue Burst; Bank 2
Write Cycle, Continue Burst; Bank 2
Read Cycle, Suspend Burst; Bank 1
Read Cycle, Suspend Burst; Bank 1
Read Cycle, Suspend Burst; Bank 2
Read Cycle, Suspend Burst; Bank 2
Read Cycle, Suspend Burst; Bank 1
Read Cycle, Suspend Burst; Bank 1
Read Cycle, Suspend Burst; Bank 2
Read Cycle, Suspend Burst; Bank 2
Write Cycle, Suspend Burst; Bank 1
Write Cycle, Suspend Burst; Bank 1
Write Cycle, Suspend Burst; Bank 2
Write Cycle, Suspend Burst; Bank 2
E
1
#
H
X
L
L
H
H
L
H
L
L
H
H
X
X
H
H
H
H
H
H
X
H
H
H
X
X
H
H
H
H
H
H
X
H
H
H
E
2
#
X
H
H
H
L
L
H
L
H
H
L
L
H
H
X
X
H
H
H
H
H
H
X
H
H
H
X
X
H
H
H
H
H
H
X
H
E
3
# E
4
#
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
ADSP# ADSC#
X
L
X
L
L
X
L
X
L
X
L
X
H
L
H
L
H
L
H
L
H
L
H
L
X
H
X
H
X
H
X
H
X
H
X
H
X
H
X
H
H
H
X
H
H
H
X
H
H
H
H
H
H
H
H
H
X
H
X
H
X
H
X
H
H
H
X
H
H
H
X
H
ADV#
X
X
X
X
X
X
X
X
X
X
X
X
L
L
L
L
L
L
L
L
L
L
L
L
H
H
H
H
H
H
H
H
H
H
H
H
WED2CG472512V-D2
ADVANCED
GW#
X
X
X
X
X
X
L
L
H
H
H
H
H
H
H
H
H
H
H
H
L
L
L
L
H
H
H
H
H
H
H
H
L
L
L
L
G#
X
X
L
H
L
H
X
X
L
H
L
H
L
H
L
H
L
H
L
H
X
X
X
X
L
H
L
H
L
H
L
H
X
X
X
X
CK
L-H
L-H
L-H
L-H
L-H
L-H
L-H
L-H
L-H
L-H
L-H
L-H
L-H
L-H
L-H
L-H
L-H
L-H
L-H
L-H
L-H
L-H
L-H
L-H
L-H
L-H
L-H
L-H
L-H
L-H
L-H
L-H
L-H
L-H
L-H
L-H
DQ
High-Z
High-Z
Q
High-Z
Q
High-Z
D
D
Q
High-Z
Q
High-Z
Q
High-Z
Q
High-Z
Q
High-Z
Q
High-Z
D
D
D
D
Q
High-Z
Q
High-Z
Q
High-Z
Q
High-Z
D
D
D
D
Addr. Used
None
None
External
External
External
External
External
External
External
External
External
External
Next
Next
Next
Next
Next
Next
Next
Next
Next
Next
Next
Next
Current
Current
Current
Current
Current
Current
Current
Current
Current
Current
Current
Current
Note A: All truth Table Functions Repeat for Bank 3 (E
3
#) and Bank 4 (E
4
#).
SYNCHRONOUS ONLY – TRUTH TABLE
Operation
Synchronous Write - Bank 1
Synchronous Read - Bank 1
Synchronous Write - Bank 2
Synchronous Read - Bank 2
Synchronous Write - Bank 3
Synchronous Read - Bank 3
Synchronous Write - Bank 4
Synchronous Read - Bank 4
Snooze Mode
E
1
#
L
L
H
H
H
H
H
H
X
E
2
#
H
H
L
L
H
H
H
H
X
E
3
#
H
H
H
H
L
L
H
H
X
E
4
#
H
H
H
H
H
H
L
L
X
GW#
L
H
L
H
L
H
L
H
X
G#
H
L
H
L
H
L
H
L
X
ZZ
L
L
L
L
L
L
L
L
H
X
High-Z
High-Z
High-Z
High-Z
CK
DQ
High-Z
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
Aug. 2002
Rev. B
4
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com
WEDC [ WHITE ELECTRONIC DESIGNS CORPORATION ]
