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WED2ZL361MS30BI 参数 Datasheet PDF下载

WED2ZL361MS30BI图片预览
型号: WED2ZL361MS30BI
PDF下载: 下载PDF文件 查看货源
内容描述: 1Mx36同步管道突发NBL SRAM [1Mx36 Synchronous Pipeline Burst NBL SRAM]
分类和应用: 存储内存集成电路静态存储器
文件页数/大小: 12 页 / 647 K
品牌: WEDC [ WHITE ELECTRONIC DESIGNS CORPORATION ]
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WED2ZL361MS  
White Electronic Designs  
ABSOLUTE MAXIMUM RATINGS*  
Voltage on VCC Supply Relative to VSS  
Vin (DQx)  
-0.3V to +3.6V  
-0.3V to +3.6V  
-0.3V to +3.6V  
-55°C to +125°C  
100mA  
Vin (Inputs)  
Storage Temperature (BGA)  
Short Circuit Output Current  
*Stress greater than those listed under “Absolute Maximum Ratings: may cause permanent damage to the device. This is a stress rating  
only and functional operation of the device at these or any other conditions greater than those indicated in the operational sections of this  
specification is not implied. Exposure to absolute maximum rating condtions for extended periods may affect reliability.  
RECOMMENDED DC OPERATING CONDITIONS  
(Voltage Referenced to: VSS = OV, TA = 0°C; Commercial or -40°C ≤ TA ≤ 85°C; Industrial)  
Description  
Symbol  
VIH  
Conditions  
Min  
1.7  
-0.3  
-5  
Max  
Units  
V
Notes  
Input High (Logic 1) Voltage  
Input Low (Logic 0) Voltage  
Input Leakage Current  
Output Leakage Current  
Output High Voltage  
Output Low Voltage  
Supply Voltage  
VCC +0.3  
1
1
2
VIL  
0.7  
5
V
0V ≤ VIN ≤ VCC  
Output(s) Disabled, 0V ≤ VIN ≤ VCC  
IOH = -1.0mA  
ILI  
µA  
µA  
V
ILO  
-5  
5
VOH  
VOL  
VCC  
2.0  
1
1
1
IOL = 1.0mA  
0.4  
2.625  
V
2.375  
V
NOTES:  
1. All voltages referenced to VSS (GND)  
2. ZZ pin has an internal pull-up, and input leakage is higher.  
DC CHARACTERISTICS  
250  
MHz  
200  
MHz  
166  
MHz  
133  
MHz  
Description  
Symbol  
Conditions  
Typ  
Units  
Notes  
Power Supply  
Current: Operating  
Device Selected; All Inputs � VIL or � VIH; Cycle  
Time = TCYC MIN; VCC = MAX; Output Open  
IDD  
900  
800  
60  
690  
580  
60  
mA  
mA  
1, 2  
Device Deselected; VCC = MAX; All Inputs� VSS + 0.2  
or VCC - 0.2; All Inputs Static; CK Frequency = 0;  
ZZ � VIL  
Power Supply  
Current: Standby  
ISB2  
ISB3  
ISB4  
30  
20  
60  
40  
60  
40  
2
2
2
Device Selected; All Inputs � VIL or � VIH; Cycle  
Time = TCYC MIN; VCC = MAX; Output Open;  
ZZ � VCC - 0.2V  
Power Supply  
Current: Current  
40  
40  
mA  
mA  
Device Deselected; VCC = MAX; All Inputs  
� VSS + 0.2 or VCC - 0.2; Cycle Time = TCYC  
MIN; ZZ � VIL  
Clock Running  
Standby Current  
150  
140  
130  
100  
NOTES:  
1.  
I
I
DD is specified with no output current and increases with faster cycle times.  
DD increases with faster cycle times and greater output loading.  
2.  
Typical values are measured at 2.5V, 25°C, and 10ns cycle time.  
BGA CAPACITANCE  
Description  
Symbol  
CI  
Conditions  
Typ  
5
Max  
Units Notes  
Control Input Capacitance  
Input/Output Capacitance (DQ)  
Address Capacitance  
Clock Capacitance  
TA = 25°C; f = 1MHZ  
TA = 25°C; f = 1MHZ  
TA = 25°C; f = 1MHZ  
TA = 25°C; f = 1MHZ  
7
8
7
5
pF  
pF  
pF  
pF  
1
1
1
1
CO  
6
CA  
5
CCK  
3
NOTES:  
1.  
This parameter is sampled.  
White Electronic Designs Corp. reserves the right to change products or specifications without notice.  
Oct, 2002  
Rev. 5  
4
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com