White Electronic Designs
1Mx36 Synchronous Pipeline Burst NBL SRAM
FEATURES
Fast clock speed: 166, 150, 133, and 100MHz
Fast access times: 3.5ns, 3.8ns, 4.2ns, and 5.0ns
Fast OE# access times: 3.5ns, 3.8ns, 4.2ns, and
5.0ns
Single +3.3V ± 5% power supply (V
CC
)
Snooze Mode for reduced-standby power
Individual Byte Write control
Clock-controlled and registered addresses, data
I/Os and control signals
Burst control (interleaved or linear burst)
Packaging:
•
119-bump BGA package
Low capacitive bus loading
This product is subject to change without notice.
WED2ZL361MV
DESCRIPTION
The WEDC SyncBurst — SRAM family employs high-
speed, low-power CMOS designs that are fabricated
using an advanced CMOS process. WEDC’s 32Mb
SyncBurst SRAMs integrate two 1M x 18 SRAMs into a
single BGA package to provide 1M x 36 configuration. All
synchronous inputs pass through registers controlled by
a positive-edge-triggered single-clock input (CLK). The
NBL or No Bus Latency Memory utilizes all the bandwidth
in any combination of operating cycles. Address, data
inputs, and all control signals except output enable and
linear burst order are synchronized to input clock. Burst
order control must be tied “High or Low.” Asynchronous
inputs include the sleep mode enable (ZZ). Output Enable
controls the outputs at any given time. Write cycles are
internally self-timed and initiated by the rising edge of the
clock input. This feature eliminates complex off-chip write
pulse generation and provides increased timing flexibility
for incoming signals.
FIGURE 1 – PIN CONFIGURATION
(Top View)
1
V
CC
SA
NC
DQC
DQC
V
CC
DQC
DQC
V
CC
DQD
DQD
V
CC
DQD
DQD
NC
NC
V
CC
2
SA
CE2
SA
DQPC
DQC
DQC
DQC
DQC
V
CC
DQD
DQD
DQD
DQD
DQPD
SA
NC
NC
3
SA
SA
SA
V
SS
V
SS
V
SS
BW
C
#
V
SS
NC
V
SS
BW
D
#
V
SS
V
SS
V
SS
LBO
SA
NC
4
SA
ADV#
VCC
NC
CE
1
#
OE#
SA
WE#
V
CC
CLK
NC
CKE#
SA1
SA0
V
CC
SA
NC
5
SA
SA
SA
V
SS
V
SS
V
SS
BW
B
#
V
SS
NC
V
SS
BW
A
#
V
SS
V
SS
V
SS
NC
SA
NC
6
SA
CE
2
#
SA
DQPB
DQB
DQB
DQB
DQB
V
CC
DQA
DQA
DQA
DQA
DQPA
SA
NC
NC
7
V
CC
NC
NC
DQB
DQB
V
CC
DQB
DQB
V
CC
DQA
DQA
V
CC
DQA
DQA
NC
ZZ
V
CC
Block Diagram
BWc#
BWd#
BWb#
BWa#
A
B
C
D
E
F
G
H
J
K
L
M
N
P
R
T
U
1M x 18
CLK
CKE#
ADV#
LBO#
CE1#
CE2
CE2#
OE#
WE#
ZZ
CLK
CKE#
ADV#
LBO#
CS1#
CS2
CS2#
OE#
WE#
ZZ
CLK
CKE#
ADV#
LBO#
CS1#
CS2
CS2#
OE#
WE#
ZZ
1M x 18
Address Bus
(SA
0
- SA
19
)
DQc, DQd
DQPc, DQPd
DQa, DQb
DQPa, DQPb
DQa - DQd
DQPa - DQPd
June 2004
Rev. 3
1
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
WEDC [ WHITE ELECTRONIC DESIGNS CORPORATION ]
