White Electronic Designs
512K x 32/256K x 32 Dual Array
Synchronous Pipeline Burst NBL SRAM
FEATURES
Fast clock speed: 166, 150, 133, and 100MHz
Fast access times: 3.5ns, 3.8ns, 4.2ns, and 5.0ns
Fast OE# access times: 3.5ns, 3.8ns, 4.2ns, and
5.0ns
Single +2.5V ± 5% power supply (V
CC
)
Snooze Mode for reduced-standby power
Individual Byte Write control
Clock-controlled and registered addresses, data
I/Os and control signals
Burst control (interleaved or linear burst)
Packaging:
209-bump BGA package
Low capacitive bus loading
WED2ZLRSP01S
DESCRIPTION
The WED2ZLRSP01S, Dual Independent Array, NBL-
SSRAM device employs high-speed, Low-Power CMOS
silicon and is fabricated using an advanced CMOS process.
WEDC’s 24Mb, Sync Burst SRAM MCP integrates two
totally independent arrays, the first organized as a 512K x
32, and the second a 256K x 32.
All Synchronous inputs pass through registers controlled
by a positive edge triggered, single clock input per array.
The NBL or No Bus Latency Memory provides 100% bus
utilizaton, with no loss of cycles caused by change in modal
operation (Write to Read/Read to Write). All inputs except
for Asynchronous Output Enable and Burst Mode control
are synchronized on the positive or rising edge of Clock.
Burst order control must be tied either HIGH or LOW, Write
cycles are internally self-timed, and writes are initiated on
the rising edge of clock. This feature eliminates the need
for complex off-chip write pulse generation and proved
increased timing flexibility for incoming signals.
PIN CONFIGURATION
(TOP VIEW)
1
Vss
NC
A_ADR
A_ADR
A_ADR
A_ADR
A_ADR
NC
Vss
Vss
Vss
NC
B_ADR
B_ADR
B_ADR
B_ADR
B_ADR
NC
Vss
2
A_DATb
0
A_DATb
4
A_ADR
Vss
A_CK
Vss
A_ADR
A_DATc
0
A_DATc
4
Vss
B_DATb
0
B_DATb
4
B_ADR
Vss
B_CK
Vss
NC
B_DATc
4
B_DATc
0
3
A_DATb
1
A_DATb
5
A_OE#
A_CKE#
A_GWE#
A_CS
2
#
A_CS
1
#
A_DATc
1
A_DATc
5
Vss
B_DATb
1
B_DATb
5
B_OE#
B_CKE#
B_GWE#
B_CS
2
#
B_CS
1
#
B_DATc
5
B_DATc
1
4
A_DATb
2
A_DATb
6
A_ADV
Vcc
Vcc
Vcc
A_CS
2
A_DATc
2
A_DATc
6
Vss
B_DATb
2
B_DATb
6
B_ADV
Vcc
Vcc
Vcc
B_CS
2
B_DATc
6
B_DATc
2
5
A_DATb
3
A_DATb
7
A_BWEb
Vcc
Vcc
Vcc
A_BWEc
A_DATc
3
A_DATc
7
Vss
B_DAT
3
B_DAT
7
B_BWEb
Vcc
Vcc
Vcc
B_BWE
c
B_DATc
7
B_DATc
3
6
Vss
Vss
Vss
Vcc
Vcc
Vcc
Vss
Vss
Vss
Vss
Vss
Vss
Vss
Vcc
Vcc
Vcc
Vss
Vss
Vss
7
A_DATa
0
A_DATa
4
A_BWEa
Vcc
Vcc
Vcc
A_BWEd
A_DATd
0
A_DATd
4
Vss
B_DATa
0
B_DATa
4
B_BWEa
Vcc
Vcc
Vcc
B_BWEd
B_DATd
4
B_DATd
0
8
A_DATa
1
A_DATa
5
A_ZZ
Vcc
Vcc
Vcc
A_LBO#
A_DATd
1
A_DATd
5
Vss
B_DATa
1
B_DATa
5
B_ZZ
Vcc
Vcc
Vcc
B_LBO#
B_DATd
5
B_DATd
1
9
A_DATa
2
A_DATa
6
A_ADR
Vcc
Vcc
Vcc
A_ADR
A_DATd
2
A_DATd
6
Vss
B_DATa
2
B_DATa
6
B_ADR
Vcc
Vcc
Vcc
B_ADR
B_DATd
6
B_DATd
2
10
A_DATa
3
A_DATa
7
A_ADR
A_ADR
A_ADR
1
A_ADR
A_ADR
A_DATd
3
A_DATd
7
Vss
B_DATa
3
B_DATa
7
B_ADR
B_ADR
B_ADR
1
B_ADR
B_ADR
B_DATd
7
B_DATd
3
11
Vss
NC
A_ADR
A_ADR
A_ADR
0
A_ADR
A_ADR
NC
Vss
Vss
Vss
NC
B_ADR
B_ADR
B_ADR
0
B_ADR
B_ADR
NC
Vss
A
B
C
D
E
F
G
H
J
K
L
M
N
P
R
T
U
V
W
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
April, 2002
Rev. 0
1
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
WEDC [ WHITE ELECTRONIC DESIGNS CORPORATION ]
