White Electronic Designs
WED3C755E8M-XBX
RISC MICROPROCESSOR MULTI-CHIP PACKAGE
OVERVIEW
The WEDC 755E/SSRAM multichip package is targeted
for high performance, space sensitive, low power systems
and supports the following power management features:
doze, nap, sleep and dynamic power management. The
WED3C755E8M-XBX multichip package consists of:
755 RISC processor (E die revision)
Dedicated 1MB SSRAM L2 cache, configured as
128Kx72
21mmx25mm, 255 Ceramic Ball Grid Array (CBGA)
Core Frequency/L2 Cache Frequency (300MHz/
150MHz, 350MHz/175MHz)
Maximum 60x Bus frequency = 66MHz
FEATURES
The WED3C755E8M-XBX is offered in Commercial
(0°C to +70°C), industrial (-40°C to +85°C) and military
(-55°C to +125°C) temperature ranges and is well suited
for embedded applications such as missiles, aerospace,
flight computers, fire control systems and rugged critical
systems.
Footprint compatible with WED3C7558M-XBX and
WED3C750A8M-200BX
Footprint compatible with Motorola MPC 745
This product is subject to change without notice.
FIG. 1 - MULTI-CHIP PACKAGE DIAGRAM
SSRAM
µP
755E
SSRAM
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
May, 2003
Rev 2
1
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
WEDC [ WHITE ELECTRONIC DESIGNS CORPORATION ]
