WED3DG72126V-D2
1GB-128Mx72,SDRAM UNBUFFERED
FEATURES
n
Burst Mode Operation
n
Auto and Self Refresh capability
n
LVTTL compatible inputs and outputs
n
Serial Presence Detect with EEPROM
n
Fully synchronous: All signals are registered on the positive
edge of the system clock
n
Programmable Burst Lengths: 1, 2, 4, 8 or Full Page
n
3.3 volt
6
0.3v Power Supply
n
168- Pin DIMM JEDEC
*
*ADVANCED
DESCRIPTION
The WED3DG72126V is organized as a 128Mx72 synchronous
DRAM module which consists of eighteen 64Mx8 stack SDRAM
components in TSOP- 11 package, and one 2K EEPROM in an 8-
pin TSSOP package for Serial Presence Detect which are mounted
on a 168 Pin DIMM multilayer FR4 Substrate.
This datasheet describes a product that may or may not be under development
and is subject to change or cancellation without notice.
PIN CONFIGURATIONS (FRONT SIDE/BACK SIDE)
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
Front
VSS
DQ0
DQ1
DQ2
DQ3
VDD
DQ4
DQ5
DQ6
DQ7
DQ8
VSS
DQ9
DQ10
DQ11
DQ12
DQ13
VDD
DQ14
DQ15
CB0
CB1
VSS
NC
NC
VDD
WE
DQM0
Pin
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
Front
DQM1
CS0
DNU
VSS
A0
A2
A4
A6
A8
A10/AP
BA1
VDD
VDD
CLK0
VSS
DNU
CS2
DQM2
DQM3
DNU
VDD
NC
NC
CB2
CB3
VSS
DQ16
DQ17
Pin
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
Front
DQ18
DQ19
VDD
DQ20
NC
*VREF
CKE1
VSS
DQ21
DQ22
DQ23
VSS
DQ24
DQ25
DQ26
DQ27
VDD
DQ28
DQ29
DQ30
DQ31
VSS
CLK2
NC
NC
**SDA
**SCL
VDD
Pin
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
Back
VSS
DQ32
DQ33
DQ34
DQ35
VDD
DQ36
DQ37
DQ38
DQ39
DQ40
VSS
DQ41
DQ42
DQ43
DQ44
DQ45
VDD
DQ46
DQ47
CB4
CB5
VSS
NC
NC
VDD
CAS
DQM4
Pin
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
Back
DQM5
CS1
RAS
VSS
A1
A3
A5
A7
A9
BA0
A11
VDD
CLK1
A12
VSS
CKE0
CS3
DQM6
DQM7
*A13
VDD
NC
NC
CB6
CB7
VSS
DQ48
DQ49
Pin
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
Back
DQ50
DQ51
VDD
DQ52
NC
*VREF
NC
VSS
DQ53
DQ54
DQ55
VSS
DQ56
DQ57
DQ58
DQ59
VDD
DQ60
DQ61
DQ62
DQ63
VSS
CLK3
NC
**SA0
**SA1
**SA2
VDD
PIN NAMES
A0 A12
BA0-1
DQ0-63
CB0-7
CLK0-CLK3
CKE0,CKE1
CS0-CS3
RAS
CAS
WE
DQM0-7
VDD
VSS
*VREF
SDA
SCL
SA0-2
DNU
NC
Address input (Multiplexed)
Select Bank
Data Input/Output
Check bit (Data-in/data-out)
Clock input
Clock Enable input
Chip select Input
Row Address Strobe
Column Address Strobe
Write Enable
DQM
Power Supply (3.3V)
Ground
Power supply for reference
Serial data I/O
Serial clock
Address in EEPROM
Do not use
No Connect
* These pins are not used in this module.
** These pins should be NC in the system which
does not support SPD.
White Electronic Designs Corporation (508) 366-5151 www.whiteedc.com
2
March 2002 Rev. A
ECO #XXXXX
WEDC [ WHITE ELECTRONIC DESIGNS CORPORATION ]
