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WED3EG7232S-JD3 参数 Datasheet PDF下载

WED3EG7232S-JD3图片预览
型号: WED3EG7232S-JD3
PDF下载: 下载PDF文件 查看货源
内容描述: 256MB - 32Mx72 DDR SDRAM UNBUFFERED [256MB - 32Mx72 DDR SDRAM UNBUFFERED]
分类和应用: 动态存储器双倍数据速率
文件页数/大小: 12 页 / 190 K
品牌: WEDC [ WHITE ELECTRONIC DESIGNS CORPORATION ]
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WED3EG7232S-JD3
PRELIMINARY
256MB – 32Mx72 DDR SDRAM UNBUFFERED
FEATURES
Double-data-rate architecture
DDR200, DDR266, DDR333 amd DDR400
• JEDEC design specifications
Bi-directional data strobes (DQS)
Differential clock inputs (CK & CK#)
Programmable Read Latency 2, 2.5 (clock)
Programmable Burst Length (2, 4, 8)
Programmable Burst type (sequential & interleave)
Edge aligned data output, center aligned data input.
Auto and self refresh
Serial presence detect
Power supply:
• V
CC
= V
CCQ
= +2.5V ± 0.2V (100, 133 and
166MHz)
• V
CC
= V
CCQ
= +2.6V ± 0.1V (200MHz)
JEDEC 184 pin DIMM package
• JD3 PCB height: 30.48 (1.20") Max
NOTE: Consult factory for availability of:
• RoHS compliant products
• Vendor source control options
• Industrial temperature option
* This product is under development, is not qualified or characterized and is subject to
change without notice.
DESCRIPTION
The WED3EG7232S is a 32Mx72 Double Data Rate
SDRAM memory module based on 256Mb DDR SDRAM
components. The module consists of nine 32Mx8 DDR
SDRAMs in 66 pin TSOP packages mounted on a 184
pin FR4 substrate.
Synchronous design allows precise cycle control with the
use of system clock. Data I/O transactions are possible on
both edges and Burst Lengths allow the same device to be
useful for a variety of high bandwidth, high performance
memory system applications.
OPERATING FREQUENCIES
DDR400 @CL=3
Clock Speed
CL-t
RCD
-t
RP
200MHz
3-3-3
DDR333 @CL=2.5
166MHz
2.5-3-3
DDR266 @CL=2
133MHz
2-2-2
DDR266 @CL=2.5
133MHz
2.5-3-3
DDR200 @CL=2
100MHz
2-2-2
June 2006
Rev. 6
1
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com