欢迎访问ic37.com |
会员登录 免费注册
发布采购

WED48S8030E8SI 参数 Datasheet PDF下载

WED48S8030E8SI图片预览
型号: WED48S8030E8SI
PDF下载: 下载PDF文件 查看货源
内容描述: 2M ×8位×4银行同步DRAM [2M x 8 Bits x 4 Banks Synchronous DRAM]
分类和应用: 内存集成电路光电二极管动态存储器
文件页数/大小: 26 页 / 1136 K
品牌: WEDC [ WHITE ELECTRONIC DESIGNS CORPORATION ]
 浏览型号WED48S8030E8SI的Datasheet PDF文件第2页浏览型号WED48S8030E8SI的Datasheet PDF文件第3页浏览型号WED48S8030E8SI的Datasheet PDF文件第4页浏览型号WED48S8030E8SI的Datasheet PDF文件第5页浏览型号WED48S8030E8SI的Datasheet PDF文件第6页浏览型号WED48S8030E8SI的Datasheet PDF文件第7页浏览型号WED48S8030E8SI的Datasheet PDF文件第8页浏览型号WED48S8030E8SI的Datasheet PDF文件第9页  
White Electronic Designs
2M x 8 Bits x 4 Banks Synchronous DRAM
FEATURES
WED48S8030E
DESCRIPTION
The WED48S8030E is 67,108,864 bits of synchronous high
data rate DRAM organized as 4 x 2,097,152 words x 8 bits.
Synchronous design allows precise cycle control with the
use of system clock, I/O transactions are possible on every
clock cycle. Range of operating frequencies, programmable
burst lengths and programmable latencies allow the same
device to be useful for a variety of high bandwidth, high
performance memory system applications.
Available in a 54 pin TSOP type II package the
WED48S8030E is tested over the industrial temp range (-
40C to +85C) providing a solution for rugged main memory
applications.
Single 3.3V power supply
Fully Synchronous to positive Clock Edge
Clock Frequency = 125, 100MHz
SDRAM CAS# Latency = 2
Burst Operation
•Sequential or Interleave
•Burst length = programmable 1,2,4,8 or full page
•Burst Read and Write
•Multiple Burst Read and Single Write
DATA Mask Control
Auto Refresh (CBR) and Self Refresh
•4096 refresh cycles across 64ms
Automatic and Controlled Precharge Commands
Suspend Mode and Power Down Mode
Industrial Temperature Range
FIG. 1
Pin Configuration
V
CC
DQ0
V
CCQ
NC
DQ1
V
SSQ
NC
DQ2
V
CCQ
NC
DQ3
V
SSQ
NC
V
CC
NC
WE#
CAS#
RAS#
CE#
BA0
BA1
A10/AP
A0
A1
A2
A3
V
CC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
V
SS
DQ7
V
SSQ
NC
DQ6
V
CCQ
NC
DQ5
V
SSQ
NC
DQ4
V
CCQ
NC
V
SS
NC/RFU
DQM
CK
CKE
NC
A11
A9
A8
A7
A6
A5
A4
V
SS
Pin Description
A
0-11
BA
0
, BA
1
CE#
WE#
CK
CKE
DQ
0-7
DQM
RAS#
CAS#
V
CC
V
CCQ
V
SS
V
SSQ
NC
Address Inputs
Bank Select Addresses
Chip Select
Write Enable
Clock Input
Clock Enable
Data Input/Output
Data Input/Output Mask
Row Address Strobe
Column Address Strobe
Power (3.3V)
Data Output Power
Ground
Data Output Ground
No Connection
TERMINAL CONNECTIONS
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
February, 2002
Rev. 2
1
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
(TOP VIEW)