White Electronic Designs
AC CHARACTERISTICS (cont'd):
WED7PxxxCFA80xxC25
True IDE Mode I/O Input (Read) Timing Specification
Item
Data Delay after IORD
Data Hold following IORD
IORD Width Time
Address Setup before IORD
Address Hold following IORD
CE Setup before IORD
CE Hold following IORD
I0IS16 Delay Falling from Address
I0IS16 Delay Rising from Address
Symbol
td(IORD)
th(IORD)
tw(IORD)
tsuA(IORD)
thA(IORD)
tsuCE(IORD)
thCE(IORD)
tdfIOIS16(ADR)
tdrIOIS16(ADR)
IEEE Symbol
t
IGLQV
t
IGHQX
t
IGLIGH
t
AVIGL
t
IGHAX
t
ELIGL
t
IGHEH
t
AVISL
t
AVISH
Min ns.
0
165
70
20
5
20
35
35
Max ns.
100
Note: The maximum load on -I0IS16 is 1 LSTTL with 50pF total load. All times are in nanoseconds. Minimum time from WAIT# high to IORD# high is 0 nsec, but minimum IORD# width
must still be met. Dout signifies data provided by the CompactFlash Storage Card or CF+ Card to the system.
True IDE Mode I/O Output (Write) Timing Specification
Item
Data Setup before IOWR
Data Hold following IOWR
IOWR Width Time
Address Setup before IOWR
Address Hold following IOWR
CE Setup before IOWR
CE Hold following IOWR
I0IS16 Delay Falling from Address
I0IS16 Delay Rising from Address
Note:
Symbol
tsu(IOWR)
th(IOWR)
tw(IOWR)
tsuA(IOWR)
thA(IOWR)
tsuCE(IOWR)
thCE(IOWR)
tdfIOIS16(ADR)
tdrIOIS16(ADR)
IEEE Symbol
t
DVIWH
t
IWHDX
t
IWLIWH
t
AVIWL
t
IWHAX
t
ELIWL
t
IWHEH
t
AVISL
t
AVISH
Min ns.
60
30
165
70
20
5
20
Max ns.
35
35
The maximum load on -I0IS16 is 1 LSTTL with 50pF total load. All times are in nanoseconds. Minimum time from WAIT# high to IOWR# high is 0 nsec, but minimum IOWR#
width must still be met. Din signifies data provided by the system to the CompactFlash Storage Card or CF+ Card.
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
July 2005
Rev. 1
8
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com