WED7PxxxCFA80xxC25
White Electronic Designs
AC CHARACTERISTICS:
Attribute Memory Read Timing Specification
Attribute Memory access time is defined as 300ns. Detailed timing specs are shown in Table below.
300 ns
Speed Version
Item
Read Cycle Time
Symbol
tc(R)
IEEE Symbol
tAVAV
Min ns.
300
Max ns.
Address Access Time
ta(A)
tAVQV
tELQV
tGLQV
tEHQZ
tGHQZ
tAVGL
tELQNZ
tGLQNZ
tAXQX
300
300
150
100
100
Card Enable Access Time
Output Enable Access Time
Output Disable Time from CE
Output Disable Time from OE
Address Setup Time
Output Enable Time from CE
Output Enable Time from OE
Data Valid from Address Change
ta(CE)
ta(OE)
tdis(CE)
tdis(OE)
tsu(A)
ten(CE)
ten(OE)
tv(A)
30
5
5
0
Note: All times are in nanoseconds. Dout signifies data provided by the CompactFlash Storage Card or CF+ Card to the system.
The CE# signal or both the OE# signal and the WE# signal must be de-asserted between consecutive cycle operations.
Configuration Register (Attribute Memory) Write Timing Specification
The Card Configuration write access time is defined as 250ns. Detailed timing specifications are shown in Table below.
Speed Version
250 ns
Item
Symbol
tc(W)
tw(WE)
tsu(A)
trec(WE)
tsu(D-WEH)
th(D)
IEEE Symbol
tAVAV
Min ns
250
150
30
30
80
Max ns
Write Cycle Time
Write Pulse Width
Address Setup Time
Write Recovery Time
Data Setup Time for WE
Data Hold Time
tWLWH
tAVWL
tWMAX
tDVWH
tWMDX
30
Note: All times are in nanoseconds. Din signifies data provided by the system to the CompactFlash Storage Card or CF+ Card.
Common Memory Read Timing Specification
Item
Symbol
ta(OE)
tdis(OE)
tsu(A)
th(A)
tsu(CE)
th(CE)
tv(WT-OE)
tv(WT)
tw(WT)
IEEE Symbol
tGLQV
Min ns.
Max ns.
125
100
Output Enable Access Time
Output Disable Time from OE
Address Setup Time
Address Hold Time
CE Setup before OE
CE Hold following OE
Wait Delay Falling from OE
Data Setup for Wait Release
Wait Width Time
tGHQZ
tAVGL
tGHAX
tELGL
30
20
0
tGHEH
20
tGLWTV
tQVWTH
tWTLWTH
35
0
350 (3000 for CF+)
Note: The maximum load on -WAIT# is 1 LSTTL with 50pF total load. All times are in nanoseconds. Dout signifies data provided by the CompactFlash Storage Card or CF+ Card to
the system. The WAIT# signal may be ignored if the OE# cycle to cycle time is greater than the Wait Width time. The Max Wait Width time can be determined from the Card
Information Structure. The Wait Width time meets the PCMCIA specification of 12ps but is intentionally less in this specification.
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
July 2005
Rev. 1
6
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
WEDC [ WHITE ELECTRONIC DESIGNS CORPORATION ]
