Preliminary W27C4096
Standby Mode
The standby mode significantly reduces V
CC
current. This mode is entered when CE high , V
PP
= 5V,
and V
CC
= 5V. In standby mode, all outputs are in a high impedance state, independent of OE.
Two-line Output Control
Since EPROMs are often used in large memory arrays, the W27C4096 provides two control inputs for
multiple memory connections. Two-line control provides for lowest possible memory power
dissipation and ensures that data bus contention will not occur.
System Considerations
EPROM power switching characteristics require careful device decoupling. System designers are
interested in three supply current issues: standby current levels (I
SB
), active current levels (I
CC
), and
transient current peaks produced by the falling and rising edges of CE. Transient current magnitudes
depend on the device output's capacitive and inductive loading. Two-line control and proper
decoupling capacitor selection will suppress transient voltage peaks. Each device should have a 0.1
µ
F ceramic capacitor connected between its V
CC
and GND. This high frequency, low inherent-
inductance capacitor should be placed as close as possible to the device. Additionally, for every eight
devices, a 4.7
µF
electrolytic capacitor should be placed at the array's power supply connection
between V
CC
and GND. The bulk capacitor will overcome voltage slumps caused by PC board trace
inductances.
TABLE OF OPERATING MODES
(V
PP
= 12V, V
PE
= 14V, V
HH
= 12V, V
CP
= 5V, X = V
IH
or V
IL
)
MODE
CE
Read
Output Disable
Standby (TTL)
Standby (CMOS)
Program
Program Verify
Program Inhibit
Erase
Erase Verify
Erase Inhibit
Product Identifier-manufacturer
Product Identifier-device
V
IL
V
IL
V
IH
V
CC
±0.3V
V
IL
V
IH
V
IH
V
IL
V
IH
V
IH
V
IL
V
IL
OE
V
IL
V
IH
X
X
V
IH
V
IL
X
V
IH
V
IL
X
V
IL
V
IL
A0
X
X
X
X
X
X
X
V
IL
X
X
V
IL
V
IH
PINS
A9
X
X
X
X
X
X
X
V
PE
X
X
V
HH
V
HH
V
CC
V
CC
V
CC
V
CC
V
CC
V
CP
V
CP
V
CP
V
CE
V
CE
V
CE
V
CC
V
CC
V
PP
V
CC
V
CC
V
CC
V
CC
V
PP
V
PP
V
PP
V
PE
V
PE
V
PE
V
CC
V
CC
OUTPUTS
D
OUT
High Z
High Z
High Z
D
IN
D
OUT
High Z
D
IH
D
OUT
High Z
00DA (Hex)
000D (Hex)
-3-
Publication Release Date: March 1999
Revision A1
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